mirror-llvm-project/llvm/test/CodeGen/WebAssembly/simd-pr190773.ll
Paul Walker f5f107e017
[LLVM][SelectionDAG] Reduce chances of a split VSETCC being rewidened. (#191438)
This is a reimplementation of
https://github.com/llvm/llvm-project/pull/139295 but without introducing
a potential infinite type legalisation loop whereby splitting a SETCC
requires the result to be rewidened.

Fixes https://github.com/llvm/llvm-project/issues/190773
2026-04-22 11:31:02 +01:00

47 lines
1.5 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc < %s -mtriple=wasm32 -mattr=+simd128 | FileCheck %s
define <4 x i1> @f(ptr %out, <4 x half> %v) {
; CHECK-LABEL: f:
; CHECK: .functype f (i32, i32, i32, i32, i32) -> (v128)
; CHECK-NEXT: .local f32, f32, f32
; CHECK-NEXT: # %bb.0:
; CHECK-NEXT: local.get 4
; CHECK-NEXT: call __extendhfsf2
; CHECK-NEXT: local.set 5
; CHECK-NEXT: local.get 3
; CHECK-NEXT: call __extendhfsf2
; CHECK-NEXT: local.set 6
; CHECK-NEXT: local.get 2
; CHECK-NEXT: call __extendhfsf2
; CHECK-NEXT: local.set 7
; CHECK-NEXT: local.get 1
; CHECK-NEXT: call __extendhfsf2
; CHECK-NEXT: f32.const 0x0p0
; CHECK-NEXT: f32.ne
; CHECK-NEXT: i32x4.splat
; CHECK-NEXT: local.get 7
; CHECK-NEXT: f32.const 0x0p0
; CHECK-NEXT: f32.ne
; CHECK-NEXT: i32x4.replace_lane 2
; CHECK-NEXT: i32.const 63
; CHECK-NEXT: i64x2.shl
; CHECK-NEXT: i32.const 63
; CHECK-NEXT: i64x2.shr_s
; CHECK-NEXT: local.get 6
; CHECK-NEXT: f32.const 0x0p0
; CHECK-NEXT: f32.ne
; CHECK-NEXT: i32x4.splat
; CHECK-NEXT: local.get 5
; CHECK-NEXT: f32.const 0x0p0
; CHECK-NEXT: f32.ne
; CHECK-NEXT: i32x4.replace_lane 2
; CHECK-NEXT: i32.const 63
; CHECK-NEXT: i64x2.shl
; CHECK-NEXT: i32.const 63
; CHECK-NEXT: i64x2.shr_s
; CHECK-NEXT: i8x16.shuffle 0, 1, 2, 3, 8, 9, 10, 11, 16, 17, 18, 19, 24, 25, 26, 27
; CHECK-NEXT: # fallthrough-return
%cmp = fcmp une <4 x half> %v, zeroinitializer
ret <4 x i1> %cmp
}