Commit graph

590877 commits

Author SHA1 Message Date
Daniel Scherzer
6512cd96dd
[compiler-rt] [docs] Clean up explanation of __fixunsdfdi (#212624)
Replace "is compiling into" with "results in"

---------

Co-authored-by: hulxv <hulxxv@gmail.com>
2026-07-31 23:43:07 +03:00
Valentin Clement (バレンタイン クレメン)
f99ee4f26d
[flang][cuda][openacc] Emit an error when CUDA symbols are imported with CUDA disabled (#205427)
Only look for for module symbols.
2026-07-31 13:20:18 -07:00
Marlus Cadanus da Costa
68b7feaa62
[clang] Follow-up fixes for offsetof unsigned index change (#207808)
- Rename CastNoOverflow to CastAPToOffsetIndex for clarity
- Add parentheses in overflow guard condition in InterpBuiltin.cpp
- Improve comment explaining why 0x8000000000000000 is rejected

AI Tool Use: GitHub Copilot (Claude Sonnet 4.6) was used to assist in
identifying and drafting the fix. The fix was reviewed, tested, and
validated manually.

---------

Co-authored-by: Cadanus da Costa <maccosta@beenox.com>
2026-08-01 04:18:42 +08:00
forking-google-bazel-bot[bot]
582f9242ef
[Bazel] Fixes 71e5cb7 (#213330)
This fixes 71e5cb7526 (#213165).

Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=71e5cb7526151701f2e2c4e37eaa20d1763c7cd4

Co-authored-by: Google Bazel Bot <google-bazel-bot@google.com>
2026-07-31 13:13:33 -07:00
Tom Stellard
02bde07167
workflows/release-binaries: Move environment declaration to upload job (#212687)
This is the only job that actually needs to use the environment secrets,
so the environment must be declared. We were using secrets in the
prepare job to do a permissions check, but this is unnecessary, because
that job does not do anything that is security sensitive.

Only the upload job needs to have these permission checks and these are
already included in the upload-release-artifact composite action.
2026-07-31 13:00:46 -07:00
AntonyCJ30
8631e82ddb
[LoopFusion] Allow loop fusion for idempotent output dependency (#206401)
Loop Fusion incorrectly blocks fusion of loops that write the same value
to two arrays.  Writing the same value twice produces identical observable results
regardless of execution order, so fusion is safe (whether the two arrays are aliased or not). 

Fixes #94676

Co-authored-by: AntonyCJ30 <cj6186609@gmail@gmail.com>
2026-07-31 15:58:26 -04:00
Arseniy Obolenskiy
e0162ea5dc
[AMDGPU] Do not treat bitcast across FP types as canonicality-preserving (#203560)
isCanonicalized recursed through ISD::BITCAST ignoring the type change,
so value canonical as v2bf16 was wrongly treated as canonical when
bitcast to v2f16 (that has different exponent width), dropping a
required fcanonicalize
2026-07-31 21:44:24 +02:00
Arseniy Obolenskiy
b53cccf32f
[AMDGPU] Fix ImageIntrinsicOptimizer DMask check starting at wrong arg index (#213264) 2026-07-31 21:42:30 +02:00
Matt Arsenault
55f3ddff49
AMDGPU: Separate image_msaa_load from bvh-ray-tracing-insts (#213270)
Add a separate msaa-load-insts feature so image_msaa_load is available
on gfx13, which has it but not the BVH intersect-ray instructions. These
were assumed to be the same feature previously, but gfx13 does not have the
bvh instructions, but does have image_msaa_load.

Co-authored-by: Claude (Claude-Opus-4.8)
2026-07-31 19:35:56 +00:00
Joseph Huber
14ec3c42ce
[Offload] add 'olIterateSymbols' runtime function (#213036)
Summary:
This provides users with a way to check all symbols present in a given
program. This is useful for many cases where a power user wants to do
something dynamic with the objects present.
2026-07-31 14:29:06 -05:00
Paulius Velesko
7ef0ca2b13
Reland "[HIPSPV] Add in-tree SPIR-V backend support for chipStar" (#213052)
Relands #206910 (reverted in #213088) with the fix for the breakage.

IsIntegratedBackendDefault() was tied to whether the SPIR-V backend is
registered, but it also controls whether clang collapses the compile and
backend
jobs, so builds without the SPIR-V target split every HIPSPV RDC device
compile
and failed hipspv-toolchain-rdc.hip. The default is back to the base
class value
and the translator fallback is decided in
constructLinkAndEmitSpirvCommand.
Third commit adds a test not guarded by spirv-registered-target.

Validated in X86;SPIRV and X86 only builds: driver tests pass in both,
and
non-RDC plus RDC (new driver) flows run for real emit spirv-val clean
modules
via the backend and via llvm-spirv respectively.
2026-07-31 15:23:48 -04:00
Alexey Bataev
54fedf4ed1
[SLP]Fix miscompile from poison base in alias-check versioning
Emit the runtime alias check while the block is still fully connected.
LCSSA-preserving SCEV expansion rewrites out-of-loop uses of
loop-defined bases to poison in predecessor-less blocks, corrupting
both the moved body and the scalar fallback clone.

Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/213338
2026-07-31 15:08:11 -04:00
Matt Arsenault
c3fe6957de
CSKY: Consume "float-abi" module flag (#212975)
Start respecting float-abi, and fall back on the TargetOptions
field if not present.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply@anthropic.com>
2026-07-31 19:06:33 +00:00
Alexey Bataev
93a1495bcc
[SLP][NFC]Add a test with the runtime checks miscompilation, NFC
Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/213336
2026-07-31 15:01:02 -04:00
Nico Weber
1e089f19b2
[gn build] Port d9278ad4e6 (#213335) 2026-07-31 14:58:55 -04:00
Nico Weber
ae14df3fd7
[gn build] Port 0a1f0aafed (#213334) 2026-07-31 14:58:03 -04:00
Ayokunle Amodu
00e7c3564c
[CIR][AMDGPU] Add support for AMDGCN tanh builtins (#197852)
Adds codegen for the following AMDGCN tanh builtins:

- __builtin_amdgcn_tanhf (float)
- __builtin_amdgcn_tanhh (half)
- __builtin_amdgcn_tanh_bf16 (bfloat16)

These are lowered to the corresponding `llvm.amdgcn.tanh` intrinsic.
2026-07-31 14:57:40 -04:00
Ayokunle Amodu
3ece94d8f3
[CIR][AMDGPU] Add support for AMDGCN trig_preop builtins (#197399)
Adds codegen for the following AMDGCN trigonometric pre-operation
builtins:

- __builtin_amdgcn_trig_preop (double)
- __builtin_amdgcn_trig_preopf (float)

These are lowered to the corresponding `llvm.amdgcn.trig.preop`
intrinsic.
2026-07-31 14:55:38 -04:00
Folkert de Vries
460c1d327b
[NFC][PowerPC] add ppcf128 tests for fneg and nofpclass (#213307) 2026-07-31 20:52:08 +02:00
Tom Stellard
22308c4c51
workflows/release-sources: Pass release-version to upload-release-artifacts (#212660)
This was omitted from a8ccd42ab2.
2026-07-31 11:51:25 -07:00
Ryan Buchner
6d7c951e14
[SLP] Add tests for overcosted scalar splats for RISCV (#213142)
Tests for #213104.
2026-07-31 11:36:49 -07:00
Zane Hambly
ae2261652f
[X86] Don't emit personality info when the personality is not a function (#212803)
Follow-up to #212417, another one in the same corner.

`llc -mtriple=x86_64-pc-windows-msvc` crashes on a function whose
personality isn't a function:

```llvm
define void @a() personality ptr null {
  ret void
}
```

`dyn_cast<Function>` gives null, and `beginFunclet` hands that straight
to `getSymbol`, which dereferences it.

`DwarfCFIException` already guards against this, applying the null check
to both branches:

```cpp
shouldEmitPersonality =
    (forceEmitPersonality ||
     (hasLandingPads && PerEncoding != dwarf::DW_EH_PE_omit)) && Per;
```

`WinException` has it inside the second operand, so
`forceEmitPersonality` bypasses it. Move it out so it gates both,
matching the Dwarf path.

The test covers both directions: the null personality no longer emits a
handler, and a real personality with a landing pad still emits
`.seh_handler __CxxFrameHandler3` as before. `CodeGen/WinEH` is 19/19.

Fixes #210285
2026-07-31 20:35:10 +02:00
Scott Manley
f8d6aaf8ca
[flang][NFC] move addPass* template utilities to header (#213288)
Move the addPass* template utilities to the header so external pipelines
can use them.
2026-07-31 13:30:31 -05:00
Alexey Bataev
56b45895fa
[SLP][NFC]Add a test for fmul copyables to fmuladd, NFC
Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/213328
2026-07-31 14:24:56 -04:00
Hristo Hristov
34de4392d0
[libc++][ranges][test-suite][NFC] Consistency improvements after P3050 merge (#213062)
Consistency improvements and other small tweaks.

A follow-up to https://github.com/llvm/llvm-project/pull/193891 - the
changes were deferred to reduce the size of an already large and
approved PR.
2026-07-31 21:23:54 +03:00
Daniil Kovalev
2f8eb5b4be
[clang][llvm][AArch64] Set hardening fn attrs on synthetic functions (#211013)
Compiler-synthesized functions such as `__llvm_gcov_writeout`,
`__llvm_gcov_reset` and `__llvm_gcov_init` were previously never
receiving the AArch64 hardening function attributes (ptrauth-returns,
ptrauth-auth-traps, ptrauth-indirect-gotos and
aarch64-jump-table-hardening) since the attributes were only emitted by
Clang and gated by `PointerAuthOptions` structure's corresponding
fields. See `setPointerAuthFnAttributes` and
`initPointerAuthFnAttributes` member functions of `TargetCodeGenInfo`.

This patch resolves this in the same manner as #83153 does for several
other attributes. Particularly, Clang now emits corresponding 4 module
flags (conditionally on whether the related feature is enabled) with Max
behavior, and LLVM's `Function::createWithDefaultAttr` derives the
matching function attributes from them. Max behavior with conditional
emission is safe because none of these features affect ABI, so promoting
an absent flag on module merge cannot break compatibility.
2026-07-31 18:22:44 +00:00
Andy Kaylor
998ba43d74
[CIR] Implement fenv lowering to constrained intrinsic calls (#213105)
This change adds support for lowering floating-point operations with the
fenv attribute set to a call to the corresponding constrained intrinsic
when the operation is lowered to the LLVM dialect.

Generation of operations with the Fenv attribute set will be implemented
in a later change. This only adds support for lowering.

Assisted-by: Cursor / claude-opus-4.8
2026-07-31 11:21:35 -07:00
Manasij Mukherjee
3b852e3b02
[TableGen] Use DenseMap in getValueType instead of StringSwitch (#213229)
StringSwitch is linear.
getValueType gets called often, identified by callgrind to be
responsible for 11% of the executed instructions for NVPTX
-gen-dag-isel.

With DenseMap or StringMap, NVPTX and RISCV -gen-dag-isel runs 20% and
15% faster respectively.

Modest 2-6% improvement for others.
2026-07-31 20:15:57 +02:00
jimingham
1969f15300
Reapply "Make result variables obey their dynamic values in subsequent expressions" (#211321) (#213308)
This adds back the patch that makes result variables retain their
dynamic type when you use them in subsequent expressions or fetch their
SBValues.

This reverts commit e1af868257.

The first time I submitted this I had some flakey tests, but when I
fixed the accounting for synthetic children those went away. But the
patch was still failing in a set of ObjC tests on x86_64. Those failures
weren't caused by this patch, but rather uncovered a bug in Tagged
Pointer detection, which I fixed in:

https://github.com/llvm/llvm-project/pull/213163
2026-07-31 11:13:06 -07:00
Tim
8225c81dbf
[flang][debug] Add compressed DWARF support in Flang (#212584)
Re-use most of the clang implementation for compressed DWARF support in
flang.

AI attribution: Co-developed with Claude Opus 4.6
2026-07-31 13:10:14 -05:00
vangthao95
e4de0dd15f
AMDGPU/GlobalISel: Switch more FP opcodes to extended LLTs (part 3) (#213135)
Migrate trigonometric, division, remainder, multiply-add, and min/max
opcodes to extended floating-point LLTs.

Remove redundant scalar clamps that request unsupported f128-to-f64
narrowing, while retaining required f16-to-f32 widening.

Also update the relevant MIR tests.
2026-07-31 11:09:20 -07:00
Nick Sarnie
5d4cd81d0e
[offload][lit] Re-enable olCreateProgram JIT test on AMDGPU (#213321)
Should be passing now.

Context: https://github.com/llvm/llvm-project/pull/213149

Signed-off-by: Nick Sarnie <nick.sarnie@intel.com>
2026-07-31 18:07:04 +00:00
Razvan Lupusoru
71e5cb7526
[mlir][acc] Introduce ACCToLLVM and executable directive codegen (#213165)
Adds initial infrastructure for converting the acc dialect to LLVM,
specifically around generating libacctarget runtime calls. The current
libacctarget APIs are not yet finalized, but the draft proposal can be
found at https://github.com/llvm/llvm-project/pull/197894. This PR adds
codegen for acc init, shutdown, set, and wait.
2026-07-31 11:04:46 -07:00
Koakuma
7afc89970f
[SPARC] Add patterns for i64->i32 and i64->i16 BSWAP-STOREs (#210483)
The lack of those is causing instruction selection to fail.

Also, for completeness, add variants of extending/truncating ops for
LOAD-BSWAP pairs too.
2026-07-31 18:02:13 +00:00
Marc Auberer
bfc237a515
[IR] Remove deprecated typed-pointer creation APIs (#212812)
Removes `PointerType::get(Type*, unsigned)`,
`PointerType::getUnqual(Type*)`, and `Type::getPointerTo(unsigned)`, the
last typed-pointer-creation leftovers from the opaque pointers
migration. All three have been marked deprecated for a while and have no
remaining in-tree callers; every caller already uses the
LLVMContext-taking overloads.

Co-authored-by: Claude <noreply@anthropic.com>
2026-07-31 20:01:46 +02:00
Matt Arsenault
0aa3c9e671
AMDGPU: Add missing smem-prefetch-insts to gfx12.5/gfx13 feature map (#213297)
fillAMDGCNFeatureMap omitted smem-prefetch-insts for gfx125x and gfx13,
so clang wrongly rejected __builtin_amdgcn_s_prefetch_data / _inst /
s_buffer_prefetch_data.

Co-authored-by: Claude (Claude-Opus-4.8)
2026-07-31 17:29:31 +00:00
Vicky Nguyen
93da16b5ed
[CIR][AArch64] Upstream store (vstrq_p128) NEON builtins (#212677)
Related to https://github.com/llvm/llvm-project/issues/185382

CIR lowering for store intrinsics (`vstrq_p128`)
(https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#store)

Port test from `clang/test/CodeGen/AArch64/poly128.c` to
`clang/test/CodeGen/AArch64/neon/store.c`
2026-07-31 10:27:34 -07:00
Louis Dionne
c433135c99
[libc++] Remove unused headers from <cmath> (#213114)
I believe these headers were relevant when we actually implemented
functions in `<cmath>`, but they are not anymore. Note that ::hypot in
particular is obtained from <math.h> like all the other math functions.

Co-authored-by: A. Jiang <de34@live.cn>
2026-07-31 13:25:22 -04:00
Louis Dionne
9bc2dd1a70
[libc++] Add an assertion for monotonic_buffer_resource's initial_size (#213136)
[mem.res.monotonic.buffer.ctor] requires initial_size to be greater than
zero for the two constructors that take one, but we silently accepted
zero. Add a hardening assertion for that precondition.

Fixes #213059
2026-07-31 13:21:58 -04:00
Timm Baeder
194d7d819f
[llvm] Include ArrayRef.h in GenericCycleInfo.h (#213267)
Try to fix the llvm-x86_64-debian-dylib builder, which has been broken
for a while with:

```
CCACHE_CPP2=yes CCACHE_HASHDIR=yes CCACHE_SLOPPINESS=pch_defines,time_macros /usr/bin/ccache /usr/bin/clang++ -DLLVM_EXPORTS -D_DEBUG -D_GLIBCXX_ASSERTIONS -D_GLIBCXX_USE_CXX11_ABI=1 -D_GNU_SOURCE -D_LIBCPP_HARDENING_MODE=_LIBCPP_HARDENING_MODE_EXTENSIVE -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS -I/b/1/llvm-x86_64-debian-dylib/build/lib/CodeGen -I/b/1/llvm-x86_64-debian-dylib/llvm-project/llvm/lib/CodeGen -I/b/1/llvm-x86_64-debian-dylib/build/include -I/b/1/llvm-x86_64-debian-dylib/llvm-project/llvm/include -fPIC -fvisibility-inlines-hidden -Werror=date-time -Werror=unguarded-availability-new -Wall -Wextra -Wno-unused-parameter -Wwrite-strings -Wcast-qual -Wmissing-field-initializers -pedantic -Wno-long-long -Wc++98-compat-extra-semi -Wimplicit-fallthrough -Wcovered-switch-default -Wno-noexcept-type -Wnon-virtual-dtor -Wdelete-non-virtual-dtor -Wsuggest-override -Wstring-conversion -Wno-pass-failed -Wmisleading-indentation -Wctad-maybe-unsupported -fdiagnostics-color -ffunction-sections -fdata-sections -O3 -DNDEBUG -UNDEBUG -fno-exceptions -funwind-tables -fno-rtti -std=c++17 -MD -MT lib/CodeGen/CMakeFiles/LLVMCodeGen.dir/CodeGenPrepare.cpp.o -MF lib/CodeGen/CMakeFiles/LLVMCodeGen.dir/CodeGenPrepare.cpp.o.d -o lib/CodeGen/CMakeFiles/LLVMCodeGen.dir/CodeGenPrepare.cpp.o -c /b/1/llvm-x86_64-debian-dylib/llvm-project/llvm/lib/CodeGen/CodeGenPrepare.cpp
In file included from /b/1/llvm-x86_64-debian-dylib/llvm-project/llvm/lib/CodeGen/CodeGenPrepare.cpp:53:
In file included from /b/1/llvm-x86_64-debian-dylib/llvm-project/llvm/include/llvm/IR/CycleInfo.h:18:
/b/1/llvm-x86_64-debian-dylib/llvm-project/llvm/include/llvm/ADT/GenericCycleInfo.h:231:33: error: member reference base type 'ArrayRef' is not a structure or union
    return ArrayRef(BlockLayout).slice(Cyc.EntryBegin, Cyc.EntrySize);
           ~~~~~~~~~~~~~~~~~~~~~^~~~~~
```

see e.g.
https://lab.llvm.org/buildbot/#/builders/60/builds/5422/steps/5/logs/stdio


I'm not sure if this will help or not, I can't reproduce this locally
and nobody else seems to have the same problem(?).
2026-07-31 19:21:36 +02:00
Louis Dionne
dac66ca477
[libc++] Fix dangling reference in the associative container benchmarks (#213139)
Two insert benchmarks were registered with lambdas capturing insert_iter_iter_bench
by reference, unlike every other registration in this file, which captures by value.

RegisterBenchmark() stores the lambda by value and only invokes it from
RunSpecifiedBenchmarks(), which happens long after associative_container_benchmarks()
has returned, creating a dangling reference.
2026-07-31 13:21:21 -04:00
Louis Dionne
69685bb9ce
[libc++] Actually partially populate the container in a benchmark (#213146)
The "partially populated" variant of assignment was a copy-paste of the
"into cleared container" assignment.
2026-07-31 13:20:14 -04:00
Valery Dmitriev
5e67107334
[flang] Do not convert load and store FIR ops to memref if volatile (#212884)
Memref dialect has no way to express volatility currently. Let such FIR
operations to stay as FIR to be handled by CodeGen in path to LLVM.
2026-07-31 10:10:28 -07:00
Matt Arsenault
bbbc3e4cc9
clang: Emit "float-abi" module flag (#212985)
Emit the new module flag if it differs from the triple's
default.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply@anthropic.com>
2026-07-31 19:07:04 +02:00
Vachan
7fd627a749
[X86] combineSelect - fold select(c,vtrunc(x),0) => X86ISD::MTRUNC(x,c) (#212865)
resolves #156883
2026-07-31 16:59:11 +00:00
Ramkumar Ramachandra
d954981457
[VPlan] Use match_fn in uncountableEarlyExit (NFC) (#213289) 2026-07-31 17:37:34 +01:00
Ramkumar Ramachandra
ac5e5fd704
[VPlan] Use subpattern-m_VPValue in simplifyRecipe (NFC) (#213268)
Use the subpattern variant of m_VPValue introduced in 8db13de ([VPlan]
Remove redundant x && (y && x) -> x && y combine, #213219) to improve
code in simplifyRecipe.
2026-07-31 17:37:08 +01:00
Min-Yih Hsu
ff9b99207b
[RISCV] Fix incorrect lowering of VECTOR_INTERLEAVE on fixed vectors (#212642)
This is the sibling patch of #207254, as it turns out VECTOR_INTERLEAVE
has the same problem on fixed vectors as well.

Instead of converting individual operands into scalable vectors, this
patch puts each of the operands directly onto stack using the fixed
vector version of segmented store intrinsics, before loading them back.

---------

Co-authored-by: Luke Lau <luke@igalia.com>
2026-07-31 09:29:40 -07:00
Joseph Huber
b232d110b0
[libc] Fix math failures for fmod on NVPTX (#213168)
Summary:
Fixes some failing tests. Fmod's builtin has improper handling in the
NVPTX instruction so we should just use the generic version for now. The
Float128 implementation seems to have had some undefined behavior for
out of range behavior that only showed up now. Hopefully someone can
tell me if this is fixed correctly.
2026-07-31 11:21:26 -05:00
Adam Smith
1fe55891a7
[CIR] Accept _BitInt up to 128 bits in x86_64 callconv lowering (#212668)
The x86_64 bridge in `CallConvLoweringPass.cpp` rejected every
`_BitInt`, so a function taking or returning one reported NYI even
though the ABI library already classifies these types. The classifier
has to be told the integer is bit-precise, and `mapCIRType` was dropping
that flag, which its two-eightbyte handling keys on. With the flag
forwarded, accepting widths up to 128 is mostly a matter of letting the
classifier's answer through. Wider widths stay rejected, for the reason
on the accept check.

Relaxing that check alone was not enough. `convertABIArgInfo` discarded
the classifier's coerce for every non-aggregate, which would have left a
`_BitInt(33)` as i33 where classic CodeGen passes i64. It now takes the
coercion path for a multi-register tuple coerce and for one wider than
the natural type. A narrower or equal coerce still means unchanged,
which is what preserves a `_BitInt(128)`'s 8-byte alignment.

Two `noundef` gaps against classic CodeGen remain. Neither mechanism is
new, but this change is what makes both reachable for `_BitInt`. CIRGen
omits the attribute for a width that is not a multiple of 8, and the
rewriter attaches none to the arguments it creates when flattening, so a
`_BitInt(72)` that CIRGen did mark loses it once the pair is split.
2026-07-31 11:20:43 -05:00