mirror-llvm-project/llvm/test/CodeGen/SPARC
Koakuma f2342e84e6
[SPARC] Don't combine misaligned memory ops with BSWAP (#206345)
Doing it will result in a misaligned LD*A/ST*A instruction, which will
raise a bus error.

This should fix the failure in `clamscan` test.
2026-07-05 13:15:04 +00:00
..
32abi.ll
64abi.ll [clang][SPARC] Pass 16-aligned structs with the correct alignment in CC (#155829) 2025-09-26 10:28:10 +07:00
64atomics.ll
64bit.ll
64cond.ll
64spill.ll
2006-01-22-BitConvertLegalize.ll
2007-05-09-JumpTables.ll
2007-07-05-LiveIntervalAssert.ll
2008-10-10-InlineAsmMemoryOperand.ll
2008-10-10-InlineAsmRegOperand.ll
2009-08-28-PIC.ll
2009-08-28-WeakLinkage.ll
2011-01-11-Call.ll
2011-01-11-CC.ll [SPARC] Use addxccc to do multiword addition when we have VIS3 2025-04-16 08:36:47 +07:00
2011-01-11-FrameAddr.ll
2011-01-19-DelaySlot.ll [SPARC] Prevent RESTORE from sourcing from %o7 in call delay slots (#172593) 2026-01-20 17:41:02 -05:00
2011-01-21-ByValArgs.ll
2011-01-22-SRet.ll
2011-12-03-TailDuplication.ll
2012-05-01-LowerArguments.ll
2013-05-17-CallFrame.ll
alloca-align.ll
analyze-branch.ll
atomicrmw-uinc-udec-wrap.ll [AtomicExpandPass] Preserve atomic and volatile nature of emulated operations (#188361) 2026-04-30 09:31:39 -07:00
atomics-ordering.ll [SPARC] Weaken emitted barriers for atomic ops (#154950) 2025-10-08 10:40:25 +09:00
atomics.ll
basictest.ll
bigreturn.ll
bitcast.ll [SPARC] Use native bitcast instructions when we have VIS3 2025-04-17 23:39:46 +07:00
blockaddr.ll
branches-relax.ll
branches-v9.ll
bswap.ll [SPARC] Don't combine misaligned memory ops with BSWAP (#206345) 2026-07-05 13:15:04 +00:00
cast-sret-func.ll
codemodel.ll
constpool.ll
constructor.ll
ctlz.ll [Sparc] Optimize compare instruction (#167140) 2025-11-14 23:11:38 +07:00
ctpop.ll
cttz.ll [Sparc] Optimize compare instruction (#167140) 2025-11-14 23:11:38 +07:00
data-align.ll
DbgValueOtherTargets.test
disable-fsmuld-fmuls.ll
empty-functions.ll
exception.ll Sparc: Improve SETHI and R_SPARC_DISP32 tests 2025-05-05 09:17:27 -07:00
float-constants.ll [SPARC] Use op-then-halve instructions when we have VIS3 2025-05-23 22:44:05 +07:00
float-ua2007.ll [SPARC] Use FMA instructions when we have UA2007 (#148434) 2025-08-12 22:46:00 +07:00
float-vis3.ll [SPARC] Use op-then-halve instructions when we have VIS3 2025-05-23 22:44:05 +07:00
float.ll
fmuladd-soft-float.ll
fp16-promote.ll [SPARC] Properly handle CC for long double on sparc32 (#162226) 2025-11-29 21:30:39 +07:00
fp128-abi.ll [SPARC] Remove CCIfConsecutiveRegs for f128 returns (#170133) 2025-12-03 15:38:48 -05:00
fp128-select.ll [Sparc] Optimize compare instruction (#167140) 2025-11-14 23:11:38 +07:00
fp128-split.ll
fp128.ll
fshl.ll
func-addr.ll
getpcx-call.ll
getpcx-rdpc.ll
globals.ll
half.ll IR: Remove llvm.convert.to.fp16 and llvm.convert.from.fp16 intrinsics (#174484) 2026-01-21 09:50:28 +00:00
hard-quad-float.ll
imm.ll
inline-asm-i-constraint-i1.ll
inlineasm-bad.ll [CodeGen][NFC] Remove contractions in error messages (#195308) 2026-05-01 11:23:24 -07:00
inlineasm-output-template.ll
inlineasm-v9.ll [SPARC][IAS] Properly set implied feature sets for ISA levels/extensions (#143232) 2025-06-20 05:12:51 +07:00
inlineasm.ll [SPARC][IAS] Properly set implied feature sets for ISA levels/extensions (#143232) 2025-06-20 05:12:51 +07:00
leafproc.ll
LeonCASAInstructionUT.ll
LeonDetectRoundChangePassUT.ll
LeonFixAllFDIVSQRTPassUT.ll
LeonInsertNOPLoadPassUT.ll
LeonItinerariesUT.ll
LeonSMACUMACInstructionUT.ll
lit.local.cfg
llvm.sincos.ll [SPARC] Properly handle CC for long double on sparc32 (#162226) 2025-11-29 21:30:39 +07:00
lrint-conv.ll [Test] Add and update tests for lrint/llrint (NFC) (#152662) 2025-08-12 09:56:51 +09:00
mature-mc-support.ll
missing-sret.ll
missinglabel.ll
mult-alt-generic-sparc.ll
multiple-div.ll
multiply-extension.ll Reapply "[SPARC] Use umulxhi to do extending 64x64->128 multiply when we have VIS3" (#135897) (#136475) 2025-04-22 20:57:56 +07:00
naked-fn-with-frame-pointer.ll
obj-relocs.ll
optcompare.ll [SPARC][NFC] Update optcompare test that always returns false (#170025) 2025-12-05 20:35:03 +07:00
overflow-intrinsic-optimizations.ll
parts.ll
pic.ll
predictable-select.ll [SPARC] Mark branches as being expensive in early Niagara CPUs (#166489) 2025-11-06 04:32:56 +07:00
private.ll
readcycle.ll
reg64.ll
register-clobber.ll
rem.ll
reserved-arg-regs.ll
reserved-regs-named.ll
reserved-regs-unavailable.ll CodeGen: Emit error if getRegisterByName fails (#145194) 2025-06-23 16:33:35 +09:00
reserved-regs.ll
salvage-debug-isel.ll
select-mask.ll
sethiandn.ll
setjmp.ll
smulo-128-legalisation-lowering.ll [Sparc] Optimize compare instruction (#167140) 2025-11-14 23:11:38 +07:00
soft-float.ll
soft-mul-div.ll
spill.ll
spillsize.ll
sret-secondary.ll
stack-align.ll
stack-protector-target.ll RuntimeLibcalls: Add some tests for OpenBSD stack protectors (#147888) 2025-07-15 15:50:54 +09:00
stack-protector.ll
stack-slot-coloring.mir [SPARC] Set how many bytes load from or store to stack slot (#182674) 2026-02-22 20:20:54 +08:00
stackaddress.ll [Clang] Add __builtin_stack_address (#148281) 2026-01-12 10:01:57 +01:00
tailcall.ll
thread-pointer.ll
tls-sp.ll [Sparc] Remove bogus stack adjustment for LD/GD TLS (#149890) 2025-07-22 16:44:18 +01:00
tls.ll
tn0009.mir
tn0010.ll [Sparc] Handle two new cases in the GRLIB-TN-0010 workaround pass (#205780) 2026-07-04 08:07:20 +02:00
tn0010.mir [Sparc] Handle two new cases in the GRLIB-TN-0010 workaround pass (#205780) 2026-07-04 08:07:20 +02:00
tn0011.ll [Sparc] Apply the GRLIB-TN-0011 errata workaround to ldstub (#205781) 2026-07-01 10:26:29 +02:00
tn0012.mir
tn0013.mir
trap.ll
umulo-128-legalisation-lowering.ll [Sparc] Optimize compare instruction (#167140) 2025-11-14 23:11:38 +07:00
varargs-v8.ll
varargs.ll
vector-call.ll
vector-extract-elt.ll
zerostructcall.ll