Tracking issue: https://github.com/llvm/llvm-project/issues/201242 Migration guide docs: https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines RFC: https://discourse.llvm.org/t/rfc-make-myst-markdown-the-llvm-docs-format-rip-rest/90840 This was prepared with rst2myst plus LLM-assisted cleanup. I paged through all the generated HTML looking for migration artifacts, and all of the differences I could find appear to be formatting error corrections. I noticed that there is a large block of literal rst text in APINotes.md, but I will defer that for later cleanup.
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AMDGPU Support
Clang supports OpenCL, HIP and OpenMP on AMD GPU targets.
Predefined Macros
| Macro | Description |
|---|---|
__AMDGPU__ |
Indicates that the code is being compiled for an AMD GPU. |
__AMDGCN__ |
Defined if the GPU target is AMDGCN. |
__R600__ |
Defined if the GPU target is R600. |
__<ArchName>__ |
Defined with the name of the architecture (e.g., __gfx906__ for the gfx906 architecture). |
__<GFXN>__ |
Defines the GFX family (e.g., for gfx906, this macro would be __GFX9__). |
__amdgcn_processor__ |
Defined with the processor name as a string (e.g., "gfx906"). |
__amdgcn_target_id__ |
Defined with the target ID as a string. |
__amdgcn_feature_<feature-name>__ |
Defined for each supported target feature. The value is 1 if the feature is enabled and 0 if it is disabled. Allowed feature names are sramecc and xnack. |
__AMDGCN_CUMODE__ |
Defined as 1 if the CU mode is enabled and 0 if the WGP mode is enabled. |
__AMDGCN_UNSAFE_FP_ATOMICS__ |
Defined if unsafe floating-point atomics are allowed. |
__HAS_FMAF__ |
Defined if FMAF instruction is available (deprecated). |
__HAS_LDEXPF__ |
Defined if LDEXPF instruction is available (deprecated). |
__HAS_FP64__ |
Defined if FP64 instruction is available (deprecated). |
Please note that the specific architecture and feature names will vary depending on the GPU. Also, some macros are deprecated and may be removed in future releases.
Target-Specific Builtins
Clang exposes AMDGPU hardware intrinsics as target-specific builtins with the
__builtin_amdgcn_ prefix. These are documented in {doc}AMDGPUBuiltinReference.