Commit graph

590924 commits

Author SHA1 Message Date
Akimasa Watanuki
610a3105af
[MLIR][LLVM] Share LLVM metadata attribute translation (#203016)
Share LLVM dialect metadata materialization through `ModuleTranslation`
so named metadata and metadata-as-value lowering use one conversion
path. Resolve metadata symbol references to functions, globals, aliases,
and ifuncs, and diagnose malformed required metadata before lowering.

Rename `MDFuncAttr` to `MDGlobalValueAttr` to reflect its support for
symbol-backed global values.
2026-08-01 22:08:29 +09:00
Akimasa Watanuki
ecb50ab04f
[MLIR][LLVM] Reject distinct generic metadata on import (#212455)
Reject distinct nodes when converting generic LLVM metadata into LLVM
dialect attributes because `MDNodeAttr` cannot preserve node identity.
Apply the policy recursively so top-level and nested nodes use the
existing unsupported-metadata failure path while finite acyclic uniqued
nodes remain importable.
2026-08-01 22:05:56 +09:00
hehuan
60f965b1f6
[clang-tidy] Fix trailing semicolon and lost comment in readability-use-std-min-max (#208782)
Fix two bugs in readability-use-std-min-max when the if body has no
braces.

For brace-less if bodies, If->getEndLoc() points to the expression end
rather than the trailing semicolon, truncating replacements and losing
comments. We find the semicolon via findNextToken and extend the range
consistent with compound statement logic.

Before:
  if (n < -1) n = -1 ;          ->  n = std::max(n, -1); ;
  if (n > 1) n = 1/*comment*/;  ->  n = std::min(n, 1);;

After:
  if (n < -1) n = -1 ;          ->  n = std::max(n, -1);
  if (n > 1) n = 1/*comment*/;  ->  n = std::min(n, 1); /*comment*/

Fixes #208708.

AI Usage: This patch is AI-assisted, reviewed and verified by me.
2026-08-01 19:09:50 +08:00
David Green
63f9de888e
[AArch64][GlobalISel] Update store merging tests to concrete types. NFC (#213429) 2026-08-01 11:57:10 +01:00
Dmitry Sidorov
71b120f63e
[AMDGPU] Use SubtargetPredicates for the f32/f16 -> fp8/bf8 conversions (#213383)
The follow-up #212888 left for the other direction. HasCvtFP8SDWASrcSel
and HasCvtFP8ByteSel replace isGFX940Plus and isGFX11Plus on the f32 ->
fp8/bf8 conversions, which split by the same encoding characteristic, so
the two feature descriptions become direction-neutral. The f16 ->
fp8/bf8 conversions had no feature at all, so add
FeatureF16FP8ConversionInsts, the mirror of the existing
FeatureFP8F16ConversionInsts, and use it in place of isGFX1250Plus.

Assisted-By: Claude Opus 5
2026-08-01 12:36:31 +02:00
A. Jiang
232e8b5f45
[libc++] Implement LWG4169: std::atomic<T>'s default constructor should be constrained (#131950)
Drive-by: Rename `constexpr_noexcept.compile.pass.cpp` to
`ctor.default.pass.cpp` as test coverage is added to it, and compile and
run it in all modes.
2026-08-01 17:20:05 +08:00
Matt Arsenault
6b98f82fe9
cmake: Derive CMake system name from a triple via new mechanism (#208773) 2026-08-01 09:41:32 +02:00
K.Roy
c27bee245f
[AMDGPU] Generalize MFMA VGPR->AGPR opcode mapping (NFC) (#213274)
Move the VGPR/AGPR pairing out of MFMATable into a generalized
AGPRFormTable class and rename getMFMASrcCVDstAGPROp to getAGPRFormOp.
MFMATable inherits AGPRFormTable, so the instantiation sites and the
generated table are unchanged.

Other instruction families with paired VGPR/AGPR pseudos, such as DS,
can now be tagged with AGPRFormTable.

Related to #168983
2026-08-01 06:15:50 +00:00
Matt Arsenault
3c3a18e239
clang: Store vendor GPU kinds in OffloadArch instead of re-listing GPUs (#213362)
OffloadArch was a flat enum that hand-duplicated every AMDGPU and NVPTX
target, plus a few edge cases. This was yet another place that needed
updating every time a new target is added, which should now be avoided.
Replace with a tagged union-like scheme.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply@anthropic.com>
2026-08-01 06:14:04 +00:00
Alexander Richardson
b94b699857
[RISCV] Fix ISCVISAInfo::computeDefaultABI() result for xcheriot (#212129)
XCheriot was not considered in this function, so RV32E+XCheriot
defaulted
to ilp32e instead of cheriot when no -target-abi was given.

Since this function does not have unit test coverage, this adds new
tests
for the ABI inference functions: RISCVISAInfo::computeDefaultABI() and
RISCVABI::computeTargetABI.

This change was created with the help of AI tools
2026-08-01 05:45:19 +00:00
Fangrui Song
d9e699957d
[X86AsmBackend] Define reset() hook (#213409)
Noticed when reviewing #175830: MCObjectStreamer::reset frees the
fragments PendingBA and PrevInstPosition point into, but X86AsmBackend
keeps them. Define the hook.
2026-08-01 05:35:03 +00:00
Jonas Devlieghere
9a15298e96
[lldb][test] Skip the JSON symbol file test on WebAssembly (#213407)
A JSON symbol file requires the UUID of the module it describes, and a
WebAssembly module carries no UUID.
2026-08-01 05:22:42 +00:00
eoineoineoin
e89830da7f
Add option to format a whole file using git-clang-format (#204336)
Today, git-clang-format will only format lines which have been modified.
However, in some cases, that's not sufficient to get a "clean" file
which would be unmodified by running `clang-format` manually.

I've got a minimal repro using the default clang-format rules. Setup a
new git repository and create a commit with an empty file:

```
mkdir /tmp/bla
cd /tmp/bla
git init
touch t.cpp
git add t.cpp
git commit -m "V1"
```

Add a line to that file containing a comment:
```
echo "int x = 0; // Comment describing x" > t.cpp
git add t.cpp
git clang-format --staged # Reports "clang-format did not modify any files"
git commit -m "V2"
```

There's nothing wrong with this file yet, and it's working as expected.
Problem arises when we add a new line with a comment which is not
aligned with the comment we've already added:

```
echo "int longerThanX = 0; // Should cause above to become aligned" >> t.cpp
git add t.cpp
git clang-format --staged # Reports "clang-format did not modify any files"
```

git-clang-format didn't change the staged file here as it's only
inspecting the modified lines, but according to the default formatting
rules, this new line actually has an effect on the preceding line. i.e.,
if you run `clang-format t.cpp`, you'll see that whitespace is added
before the "Comment describing x" to align with the "Should cause..."

It's not limited to _just_ the preceding line (e.g. in the case where we
have multiple lines like the first with comments which become
unaligned,) so can't just add more lines of context to the diff. This PR
just adds an option to format the whole file, instead of just the
modified sections.
2026-07-31 22:22:14 -07:00
Jonas Devlieghere
56eb9ab867
[lldb] Bound a WebAssembly backtrace by the target's maximum depth (#213397)
Only UnwindLLDB honored target.process.thread.max-backtrace-depth, so
UnwindWasm reported every frame the stub sent and a stack that recursed
without end was walked to its end.

Bound the frame count by the depth on every query rather than dropping
the frames that exceed it. A Wasm call stack arrives whole on the first
query, so a depth lowered after that has to still apply, which is when a
user reaches for it. The synthetic call frame addresses stay derived
from the whole stack, so the order of the frames does not depend on the
depth.
2026-07-31 21:44:20 -07:00
Feng Zou
9466be2c87
[X86][APX] Fix per-function V3 unwind for EGPR functions on Windows x64 (#212924)
A function that saves a callee-saved EGPR (R16-R31) cannot be encoded with V1/V2 unwind info, so it must use V3 even when the module default stays on V1/V2 (e.g. an APX clone created by auto-dispatch alongside a baseline generic clone). The previous code rejected such functions with a recoverable backend diagnostic ("EGPR (R16-R31) requires V3 unwind info on Windows x64") instead of emitting valid V3 unwind info.

Introduce a single shared predicate, requiresWinX64UnwindV3(MF), that returns true when the whole module is in V3 mode, or when the function needs an unwind table and may use EGPR. It is consumed by X86FrameLowering (SEH prolog/epilog layout), the X86WinEHUnwindV2 pass (which skips such functions), and the X86WinEHUnwindV3 pass (which stamps a per-function .seh_unwindversion 3 on every WinEH frame -- the entry block and each funclet). Also widen the SEH_UnwindVersion pseudo operand from i1imm to i8imm since it holds 1, 2 or 3.
2026-08-01 12:43:17 +08:00
Luke Lau
caaad6b9ff
[VPlan] Fix comments on logical-and/or combines. NFC (#213406)
The ordering needs to be adjusted to preserve poison blocking behaviour.
2026-08-01 12:39:37 +08:00
Luke Lau
4d8c8ff54e
Revert "[VPlan] Remove redundant x && (y && x) -> x && y combine (#213219)" (#213405)
This reverts commit 8db13de265.

Logical ands block poison, and commuting the operands doesn't preserve
it
2026-08-01 12:33:50 +08:00
Luke Lau
cfb2eab54d
[VPlan] Add tests for logical and and logical or combines. NFC (#213402) 2026-08-01 11:47:53 +08:00
Maksim Levental
d9d0d66574
[mlir-c] Add mlirValueReplaceUsesWithIf (#206544)
Exposes `Value::replaceUsesWithIf` through the MLIR C API, allowing callers to replace only a subset of a value's uses based on a predicate.

Assisted by: Claude
2026-07-31 20:17:21 -07:00
Zeyi Xu
037a0f40a8
[RISCV][MC] Add experimental Smcsps and Sscsps support (#211712)
Add experimental v0.19 support for the `Smcsps` and `Sscsps` conditional
stack pointer swap extensions.
2026-08-01 11:05:22 +08:00
Fangrui Song
54d05e9077
[SPARC] Parse %r_disp32 in data directives (#213398)
commit fd5c1f9497 (2014) emits %r_disp32 for pc_rel entries in
.gcc_except_table and .eh_frame, but the specifier is only recognized in
instruction operands, so llvm-mc cannot reassemble llc output.

Implement parseDataExpr with a data specifier table holding just
%r_disp32, and reject %r_disp32 outside a .word directive and in
instruction operands.

Supersedes #208933.
2026-08-01 02:52:28 +00:00
crZhao
ef19256d33
[mlir][Shard] Propagate failures in ConvertShardToMPI (#211713)
This PR fixes a crash in ConvertShardToMPI caused by ignoring a failed partial conversion and continuing to apply folding patterns to partially converted IR.

Assisted-by: codex

---------

Co-authored-by: Maksim Levental <maksim.levental@gmail.com>
2026-07-31 19:24:21 -07:00
Fangrui Song
2e81492b8a
[BFI] Simplify irreducible header discovery. NFC (#213213)
IrreducibleGraph is the explicit graph of a region -- a loop, or the
whole function -- that BFI searches for irreducible SCCs. It maintains
predecessor lists only so findIrreducibleHeaders can ask of each node
whether a predecessor lies outside its SCC (an entry), and whether a
non-entry in the same SCC reaches it via a backedge (an extra header).

Answer both from the successor lists instead; IrrNode then needs only a
successor vector. findIrreducibleHeaders is left partitioning the SCC
its sole caller is packaging, so fold it into createIrreducibleLoop.
Headers and members are sorted, so the changed iteration order does not
affect output.

Once BFI uses CycleInfo, a region's irreducible SCCs are its
non-reducible child cycles, which should let IrreducibleGraph go away
entirely. That removal has no predecessor lists to walk and
getResolvedNode has no inverse, so it must sweep successors regardless;
settling the formulation here leaves it changing only the graph.

Aided by Claude Opus 5
2026-07-31 19:04:36 -07:00
Jonas Devlieghere
cc7d719fd9
[lldb] Launch the Wasm runtime with the file the target has (#213384)
PlatformWasm hands the runtime the module to run as a path on the host
it launches the runtime on. It takes that path from the launch info,
whose executable is the name the module goes by on the platform. That
name is whatever a stub reported the module under, which need not be a
path that resolves on this host, so a relaunch runs a file that does not
exist:

```
(lldb) run
error: WebAssembly runtime exited with exit code 255
```

Run the file the target has instead. Only a runtime launched on this
host is affected, since a connection to a remote Wasm platform delegates
the launch to that platform.
2026-07-31 18:40:15 -07:00
Maksim Levental
6c82ca141a
[mlir-c] Add RewriterBase insertion point save/restore (#206531)
Exposes `OpBuilder::saveInsertionPoint` / `restoreInsertionPoint` through the MLIR C API for `MlirRewriterBase`, continuing the buildout of the rewrite/conversion C bindings.

Assisted by: Claude
2026-07-31 18:00:45 -07:00
Med Ismail Bennani
fd999b4c8b
[lldb/Interpreter] Surface Python exceptions from scripted extensions (#198153) 2026-07-31 17:51:12 -07:00
jimingham
956e241997
Disable this test on Darwin to give the author a chance to fix it. (#213388)
The test is passing elsewhere.

I filed:

https://github.com/llvm/llvm-project/issues/213386

to cover fixing the issue and re-enabling the tests.
2026-07-31 17:41:42 -07:00
LU-JOHN
eda2fb2d41
[AMDGPU] Fix canonicalization of undef in v2f16 (#213373)
When processing canonicalization with an undef in v2f16,
1. If the other element is constant, create a splat vector
2. Otherwise, convert undef to 0.0.

Update comment to make this behavior clear. Do not imply that a v2f16
with two undef's should be unconverted. Do not state that conversion of
undef to qNan is normal. `ConstantFoldScalarCall1` in
`llvm/lib/Analysis/ConstantFolding.cpp` already canonicalizes an undef
to 0.0.

Previous code only converted element 0 if element 1 was a constant.

Signed-off-by: John Lu <John.Lu@amd.com>
2026-07-31 19:34:21 -05:00
David Green
83eec36fcf
[AArch64][GlobalISel] Replace uses of getRegBank(GPRRegBankID) with GPRRegBank. NFC (#213387) 2026-08-01 01:30:12 +01:00
jimingham
35a8074759
Disable the tests in TestOSIndSYM.py (#213382)
I filed:  github.com/llvm/llvm-project/issues/213380

to cover this issue.  I'm disabling this one test till that is fixed.
2026-07-31 17:22:35 -07:00
vangthao95
c3b2b425b9
AMDGPU/GlobalISel: Switch more FP opcodes to extended LLTs (part 4) (#213353)
Migrate G_FFREXP, G_FMODF, rounding operations, and the LOG/EXP families
to extended LLTs.

Remove f64 for G_FLOG and G_FLOG10 since there is no custom lowering for
them. Adjust G_AND masking for LOG/EXP using extended LLTs.

Update the relevant MIR tests and *.ll tests.
2026-07-31 17:18:03 -07:00
Michael Jones
9001032630
[libc] Move generated elf header to include (#211428)
The fact that `hdr/elf_proxy.h` was generated with headergen was causing
dependency issues. This shouldn't be necessary, and this PR moves it out
into `include` to avoid needing headergen for an overlay build.

Assisted-by: Automated tooling, human reviewed.
2026-07-31 16:37:32 -07:00
Tom Stellard
09734937d3
workflows/llvm-abi-tests: Cache the baseline abi (#211968)
This way we don't need to recompute it for every workflow.
2026-07-31 16:32:37 -07:00
Ayokunle Amodu
b0511699c3
[CIR][AMDGPU] Add support for AMDGCN ldexp builtins (#198087)
Adds support for the following AMDGCN ldexp builtins:

- __builtin_amdgcn_ldexp (double)
- __builtin_amdgcn_ldexpf (float)
- __builtin_amdgcn_ldexph (half)

These are lowered to the `llvm.ldexp` intrinsic.
2026-07-31 19:18:49 -04:00
Valentin Clement (バレンタイン クレメン)
362d72f638
[flang][NFC] Rename modfile84.f90 to modfile85.f90 (#213371)
Avoid clash on case insensitive system
2026-07-31 19:02:09 -04:00
Thurston Dang
38d27329ec
[DropAssumes] Print drop-deref in pipeline where appropriate (#211905)
drop-deref was added as an option in #166947 and is parsed correctly,
but is not serialized. This can make it difficult to reduce test cases,
especially automatically with llvm/utils/reduce_pipeline.py.

This patch implements printPipeline() to serialize drop-deref where
appropriate.
2026-07-31 15:28:13 -07:00
Moazin K.
458b207bd6
[OpenACC][NFC] Minor clean up in ACCRoutineLowering. (#213333)
Minor NFC clean up after recent changes to remove nohost handling from
ACCRoutineLowering.

Assisted-by: Codex
2026-07-31 15:21:46 -07:00
Simon Pilgrim
d0d8c85410
[X86] getTargetConstantBitsFromNode - ensure constant data is from a vector type (#213360)
Fixes #213251
2026-07-31 22:17:07 +00:00
Sam Elliott
1cf3b70dab
[IPO] Remove IR Outliner (#211971)
The IR Outliner has major bugs and no active maintainer, and is disabled
by default. The new LLVM Policy states the pass should be removed.

This commit removes:
- The IROutliner pass
- The IRSimilarity analysis
- The `llvm-sim` executable, used for understanding the latter
- All tests of the above

Related discussion:
https://discourse.llvm.org/t/ir-outliner-status-interest/89672
2026-07-31 15:03:31 -07:00
Zhen Wang
5ca2b9313c
[flang-rt][cuda] Skip scope-exit cleanup when the context has a sticky error (#213184)
A sticky CUDA error (e.g. an illegal memory access in a kernel) leaves
the primary context active but unusable, so CUFDeviceIsActive() reports
it as fine and the compiler-generated scope-exit frees abort a program
that ran to completion: 'cudaFree(p)' failed with
'cudaErrorIllegalAddress'.

Detect this by freeing a null pointer, a no-op that still reports the
sticky error. It runs only once the primary context is known active, so
it cannot lazily create one.
2026-07-31 14:38:24 -07:00
Alexey Bataev
36187ce08a
[SLP][NFC]Add an extra check for fmul to fmuladd promotion, NFC
Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/213361
2026-07-31 17:38:16 -04:00
Alexey Bataev
96c356ab71
[SLP]Keep scheduled order when moving body in alias-check versioning
The scheduler physically reorders the block before versioning, and
emission insertion points depend on that order. Moving the body by the
pre-scheduling snapshot scrambled it and produced use-before-def IR.
Move in the block's current order instead, filtered to the original
body so the emitted check instructions stay in the header block.

Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/213358
2026-07-31 17:32:04 -04:00
Joseph Huber
a10e70b5d7
[NVPTX] Pass -Xcuda-ptxas to the nvlink wrapper for LTO (#213351)
Summary:
This allows `-foffload-lto -fgpu-rdc -Xcuda-ptxas` to work properly by
forwarding it.
2026-07-31 16:24:50 -05:00
Igor Kudrin
320164daab
[lldb] Avoid returning a stale AddressOf (#212915)
The 'ValueObject::AddressOf()' method assumes that the address of a
value object cannot change, so when it is calculated once, it does not
need to be updated afterwards. However, this is not the case if the
'ValueObject' is a dependent object obtained by calling 'Dereference()'
of another 'ValueObject'. If the latter object is changed, the dependent
value object should return a new address from the 'AddressOf()' method
to reflect the change.
2026-07-31 14:19:53 -07:00
Tom Stellard
e423bace20
workflows/require-team-membership: Fix typo (#212686) 2026-07-31 14:00:41 -07:00
Akshay K
230e5d9a02
[AArch64] Fix zero-call-used-regs crash on targets without NEON (#211603)
## Summary

`-fzero-call-used-regs=all` crashes on AArch64 targets without NEON
support, such as `-mgeneral-regs-only` or `-march=armv8-a+nosimd`. The
former is a common configuration used by the Linux kernel.

```c
int p(int a) { return a + 1; }
```

```sh
$ clang --target=aarch64-linux-gnu -O2 -S -mgeneral-regs-only \
        -fzero-call-used-regs=all test.c -o -

Assertion failed: (STI.hasNEON() && "Expected to have NEON."),
buildClearRegister
```

## Cause

`buildClearRegister()` assumes clearing floating-point registers always
requires NEON. However, `-march=armv8-a+nosimd` still has the Armv8
floating-point extension, so FP registers must be cleared without NEON,
while `-mgeneral-regs-only` has no FP support but still collects FP
registers for clearing.

## Fix

Replace the `hasNEON()` assertion with `hasFPARMv8()` for the no-NEON FP
case, and skip collecting floating-point registers entirely when the
target has no Armv8 floating-point support.

**Fixes:** #211151

Assisted-by: Cursor
2026-07-31 13:56:50 -07:00
Adam Smith
ec2bf56676
[Clang][Sema] Synthesize a memcpy body for defaulted union assignment (#206579)
A defaulted copy or move assignment operator for a union is synthesized
with an empty body. `DefineImplicitCopyAssignment` /
`DefineImplicitMoveAssignment` skip union members in the memberwise
loop, and the implied copy of the object representation has no AST
representation, a FIXME that has sat at that skip for a long time. The
operator ends up copying nothing.

Classic CodeGen hides this at ordinary call sites by lowering a trivial
assignment to a memcpy at the call site, so `u1 = u2` works even though
the operator body is a no-op. But when the operator is genuinely called,
through a pointer-to-member for instance, it silently copies nothing.
ClangIR calls the assignment operator at the call site rather than
eliding it, so it hits the empty body directly and drops every union
assignment. The no-op is then deleted at `-O3`. That is the MultiSource
`kc` miscompile, where a `YYSTYPE` union assignment (`*++yyvsp =
yylval`) becomes a no-op.

This implements the FIXME by mirroring the defaulted union copy
constructor (`CGClass.cpp`: "union copy constructor, we must emit a
memcpy") in the AST: when the class is a union,
`DefineImplicit{Copy,Move}Assignment` emits a single whole-object copy
through `buildMemcpyForAssignmentOp`, the helper already used for
trivially-copyable array members, instead of the skipped per-member
assignments. The operator stays trivial (triviality is fixed at
declaration time, before the body is synthesized), so constant
evaluation, which copies trivial unions through its own semantic path
and never executes the body, is unchanged.

Copying the object representation is correct even when a union member is
not trivially copyable, but the synthesized memcpy would then trip
`-Wnontrivial-memcall`. A `void*` cast would drop pointee qualifiers
such as the address space and inject an explicit cast node the source
never wrote. Instead the call keeps its typed union-pointer arguments,
and the union branch in `DefineImplicit{Copy,Move}Assignment` wraps the
build in `IgnoreAllWarningDiagRAII`, a save-and-restore around the
engine's existing ignore-all-warnings state. `CheckMemaccessArguments`
defers the warning and its note through `DiagRuntimeBehavior`, and that
queue flushes after the RAII has restored the previous ignore state, so
`DiagIfReachable` samples that state as it enqueues and drops what is
not error-class. Under `-w` the same queue is discarded before it
flushes, so nothing outside the scoped region changes.

Classic CodeGen now emits the copy when the operator is odr-used, and
ClangIR's union assignment lowers to a real memcpy. On the Sema side,
tests cover the synthesized AST for the implicit-`this` and C++23
explicit-object spellings, the `-Wnontrivial-memcall` suppression, the
preserved address space, the clean `-ast-print` output, and constexpr
active-member copy. The classic and ClangIR lowering is checked across
named, anonymous, and tail-padded unions.

#198918 added a defaulted-union `errorNYI` in ClangIR and deferred this
AST fix to a separate change. This PR makes that fix and drops the
guard, so the now-non-empty body lowers to a `cir.call @memcpy` instead
of erroring. Its own `union-copy-move-assignment.cpp` CIR test, which
expects that call, is the regression check.
2026-07-31 15:49:40 -05:00
Daniel Scherzer
6512cd96dd
[compiler-rt] [docs] Clean up explanation of __fixunsdfdi (#212624)
Replace "is compiling into" with "results in"

---------

Co-authored-by: hulxv <hulxxv@gmail.com>
2026-07-31 23:43:07 +03:00
Valentin Clement (バレンタイン クレメン)
f99ee4f26d
[flang][cuda][openacc] Emit an error when CUDA symbols are imported with CUDA disabled (#205427)
Only look for for module symbols.
2026-07-31 13:20:18 -07:00
Marlus Cadanus da Costa
68b7feaa62
[clang] Follow-up fixes for offsetof unsigned index change (#207808)
- Rename CastNoOverflow to CastAPToOffsetIndex for clarity
- Add parentheses in overflow guard condition in InterpBuiltin.cpp
- Improve comment explaining why 0x8000000000000000 is rejected

AI Tool Use: GitHub Copilot (Claude Sonnet 4.6) was used to assist in
identifying and drafting the fix. The fix was reviewed, tested, and
validated manually.

---------

Co-authored-by: Cadanus da Costa <maccosta@beenox.com>
2026-08-01 04:18:42 +08:00