commit fd5c1f9497 (2014) emits %r_disp32 for pc_rel entries in
.gcc_except_table and .eh_frame, but the specifier is only recognized in
instruction operands, so llvm-mc cannot reassemble llc output.
Implement parseDataExpr with a data specifier table holding just
%r_disp32, and reject %r_disp32 outside a .word directive and in
instruction operands.
Supersedes #208933.
This PR fixes a crash in ConvertShardToMPI caused by ignoring a failed partial conversion and continuing to apply folding patterns to partially converted IR.
Assisted-by: codex
---------
Co-authored-by: Maksim Levental <maksim.levental@gmail.com>
IrreducibleGraph is the explicit graph of a region -- a loop, or the
whole function -- that BFI searches for irreducible SCCs. It maintains
predecessor lists only so findIrreducibleHeaders can ask of each node
whether a predecessor lies outside its SCC (an entry), and whether a
non-entry in the same SCC reaches it via a backedge (an extra header).
Answer both from the successor lists instead; IrrNode then needs only a
successor vector. findIrreducibleHeaders is left partitioning the SCC
its sole caller is packaging, so fold it into createIrreducibleLoop.
Headers and members are sorted, so the changed iteration order does not
affect output.
Once BFI uses CycleInfo, a region's irreducible SCCs are its
non-reducible child cycles, which should let IrreducibleGraph go away
entirely. That removal has no predecessor lists to walk and
getResolvedNode has no inverse, so it must sweep successors regardless;
settling the formulation here leaves it changing only the graph.
Aided by Claude Opus 5
PlatformWasm hands the runtime the module to run as a path on the host
it launches the runtime on. It takes that path from the launch info,
whose executable is the name the module goes by on the platform. That
name is whatever a stub reported the module under, which need not be a
path that resolves on this host, so a relaunch runs a file that does not
exist:
```
(lldb) run
error: WebAssembly runtime exited with exit code 255
```
Run the file the target has instead. Only a runtime launched on this
host is affected, since a connection to a remote Wasm platform delegates
the launch to that platform.
Exposes `OpBuilder::saveInsertionPoint` / `restoreInsertionPoint` through the MLIR C API for `MlirRewriterBase`, continuing the buildout of the rewrite/conversion C bindings.
Assisted by: Claude
When processing canonicalization with an undef in v2f16,
1. If the other element is constant, create a splat vector
2. Otherwise, convert undef to 0.0.
Update comment to make this behavior clear. Do not imply that a v2f16
with two undef's should be unconverted. Do not state that conversion of
undef to qNan is normal. `ConstantFoldScalarCall1` in
`llvm/lib/Analysis/ConstantFolding.cpp` already canonicalizes an undef
to 0.0.
Previous code only converted element 0 if element 1 was a constant.
Signed-off-by: John Lu <John.Lu@amd.com>
Migrate G_FFREXP, G_FMODF, rounding operations, and the LOG/EXP families
to extended LLTs.
Remove f64 for G_FLOG and G_FLOG10 since there is no custom lowering for
them. Adjust G_AND masking for LOG/EXP using extended LLTs.
Update the relevant MIR tests and *.ll tests.
The fact that `hdr/elf_proxy.h` was generated with headergen was causing
dependency issues. This shouldn't be necessary, and this PR moves it out
into `include` to avoid needing headergen for an overlay build.
Assisted-by: Automated tooling, human reviewed.
Adds support for the following AMDGCN ldexp builtins:
- __builtin_amdgcn_ldexp (double)
- __builtin_amdgcn_ldexpf (float)
- __builtin_amdgcn_ldexph (half)
These are lowered to the `llvm.ldexp` intrinsic.
drop-deref was added as an option in #166947 and is parsed correctly,
but is not serialized. This can make it difficult to reduce test cases,
especially automatically with llvm/utils/reduce_pipeline.py.
This patch implements printPipeline() to serialize drop-deref where
appropriate.
The IR Outliner has major bugs and no active maintainer, and is disabled
by default. The new LLVM Policy states the pass should be removed.
This commit removes:
- The IROutliner pass
- The IRSimilarity analysis
- The `llvm-sim` executable, used for understanding the latter
- All tests of the above
Related discussion:
https://discourse.llvm.org/t/ir-outliner-status-interest/89672
A sticky CUDA error (e.g. an illegal memory access in a kernel) leaves
the primary context active but unusable, so CUFDeviceIsActive() reports
it as fine and the compiler-generated scope-exit frees abort a program
that ran to completion: 'cudaFree(p)' failed with
'cudaErrorIllegalAddress'.
Detect this by freeing a null pointer, a no-op that still reports the
sticky error. It runs only once the primary context is known active, so
it cannot lazily create one.
The scheduler physically reorders the block before versioning, and
emission insertion points depend on that order. Moving the body by the
pre-scheduling snapshot scrambled it and produced use-before-def IR.
Move in the block's current order instead, filtered to the original
body so the emitted check instructions stay in the header block.
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/213358
The 'ValueObject::AddressOf()' method assumes that the address of a
value object cannot change, so when it is calculated once, it does not
need to be updated afterwards. However, this is not the case if the
'ValueObject' is a dependent object obtained by calling 'Dereference()'
of another 'ValueObject'. If the latter object is changed, the dependent
value object should return a new address from the 'AddressOf()' method
to reflect the change.
## Summary
`-fzero-call-used-regs=all` crashes on AArch64 targets without NEON
support, such as `-mgeneral-regs-only` or `-march=armv8-a+nosimd`. The
former is a common configuration used by the Linux kernel.
```c
int p(int a) { return a + 1; }
```
```sh
$ clang --target=aarch64-linux-gnu -O2 -S -mgeneral-regs-only \
-fzero-call-used-regs=all test.c -o -
Assertion failed: (STI.hasNEON() && "Expected to have NEON."),
buildClearRegister
```
## Cause
`buildClearRegister()` assumes clearing floating-point registers always
requires NEON. However, `-march=armv8-a+nosimd` still has the Armv8
floating-point extension, so FP registers must be cleared without NEON,
while `-mgeneral-regs-only` has no FP support but still collects FP
registers for clearing.
## Fix
Replace the `hasNEON()` assertion with `hasFPARMv8()` for the no-NEON FP
case, and skip collecting floating-point registers entirely when the
target has no Armv8 floating-point support.
**Fixes:** #211151
Assisted-by: Cursor
A defaulted copy or move assignment operator for a union is synthesized
with an empty body. `DefineImplicitCopyAssignment` /
`DefineImplicitMoveAssignment` skip union members in the memberwise
loop, and the implied copy of the object representation has no AST
representation, a FIXME that has sat at that skip for a long time. The
operator ends up copying nothing.
Classic CodeGen hides this at ordinary call sites by lowering a trivial
assignment to a memcpy at the call site, so `u1 = u2` works even though
the operator body is a no-op. But when the operator is genuinely called,
through a pointer-to-member for instance, it silently copies nothing.
ClangIR calls the assignment operator at the call site rather than
eliding it, so it hits the empty body directly and drops every union
assignment. The no-op is then deleted at `-O3`. That is the MultiSource
`kc` miscompile, where a `YYSTYPE` union assignment (`*++yyvsp =
yylval`) becomes a no-op.
This implements the FIXME by mirroring the defaulted union copy
constructor (`CGClass.cpp`: "union copy constructor, we must emit a
memcpy") in the AST: when the class is a union,
`DefineImplicit{Copy,Move}Assignment` emits a single whole-object copy
through `buildMemcpyForAssignmentOp`, the helper already used for
trivially-copyable array members, instead of the skipped per-member
assignments. The operator stays trivial (triviality is fixed at
declaration time, before the body is synthesized), so constant
evaluation, which copies trivial unions through its own semantic path
and never executes the body, is unchanged.
Copying the object representation is correct even when a union member is
not trivially copyable, but the synthesized memcpy would then trip
`-Wnontrivial-memcall`. A `void*` cast would drop pointee qualifiers
such as the address space and inject an explicit cast node the source
never wrote. Instead the call keeps its typed union-pointer arguments,
and the union branch in `DefineImplicit{Copy,Move}Assignment` wraps the
build in `IgnoreAllWarningDiagRAII`, a save-and-restore around the
engine's existing ignore-all-warnings state. `CheckMemaccessArguments`
defers the warning and its note through `DiagRuntimeBehavior`, and that
queue flushes after the RAII has restored the previous ignore state, so
`DiagIfReachable` samples that state as it enqueues and drops what is
not error-class. Under `-w` the same queue is discarded before it
flushes, so nothing outside the scoped region changes.
Classic CodeGen now emits the copy when the operator is odr-used, and
ClangIR's union assignment lowers to a real memcpy. On the Sema side,
tests cover the synthesized AST for the implicit-`this` and C++23
explicit-object spellings, the `-Wnontrivial-memcall` suppression, the
preserved address space, the clean `-ast-print` output, and constexpr
active-member copy. The classic and ClangIR lowering is checked across
named, anonymous, and tail-padded unions.
#198918 added a defaulted-union `errorNYI` in ClangIR and deferred this
AST fix to a separate change. This PR makes that fix and drops the
guard, so the now-non-empty body lowers to a `cir.call @memcpy` instead
of erroring. Its own `union-copy-move-assignment.cpp` CIR test, which
expects that call, is the regression check.
- Rename CastNoOverflow to CastAPToOffsetIndex for clarity
- Add parentheses in overflow guard condition in InterpBuiltin.cpp
- Improve comment explaining why 0x8000000000000000 is rejected
AI Tool Use: GitHub Copilot (Claude Sonnet 4.6) was used to assist in
identifying and drafting the fix. The fix was reviewed, tested, and
validated manually.
---------
Co-authored-by: Cadanus da Costa <maccosta@beenox.com>
This is the only job that actually needs to use the environment secrets,
so the environment must be declared. We were using secrets in the
prepare job to do a permissions check, but this is unnecessary, because
that job does not do anything that is security sensitive.
Only the upload job needs to have these permission checks and these are
already included in the upload-release-artifact composite action.
Loop Fusion incorrectly blocks fusion of loops that write the same value
to two arrays. Writing the same value twice produces identical observable results
regardless of execution order, so fusion is safe (whether the two arrays are aliased or not).
Fixes#94676
Co-authored-by: AntonyCJ30 <cj6186609@gmail@gmail.com>
isCanonicalized recursed through ISD::BITCAST ignoring the type change,
so value canonical as v2bf16 was wrongly treated as canonical when
bitcast to v2f16 (that has different exponent width), dropping a
required fcanonicalize
Add a separate msaa-load-insts feature so image_msaa_load is available
on gfx13, which has it but not the BVH intersect-ray instructions. These
were assumed to be the same feature previously, but gfx13 does not have the
bvh instructions, but does have image_msaa_load.
Co-authored-by: Claude (Claude-Opus-4.8)
Summary:
This provides users with a way to check all symbols present in a given
program. This is useful for many cases where a power user wants to do
something dynamic with the objects present.
Relands #206910 (reverted in #213088) with the fix for the breakage.
IsIntegratedBackendDefault() was tied to whether the SPIR-V backend is
registered, but it also controls whether clang collapses the compile and
backend
jobs, so builds without the SPIR-V target split every HIPSPV RDC device
compile
and failed hipspv-toolchain-rdc.hip. The default is back to the base
class value
and the translator fallback is decided in
constructLinkAndEmitSpirvCommand.
Third commit adds a test not guarded by spirv-registered-target.
Validated in X86;SPIRV and X86 only builds: driver tests pass in both,
and
non-RDC plus RDC (new driver) flows run for real emit spirv-val clean
modules
via the backend and via llvm-spirv respectively.
Emit the runtime alias check while the block is still fully connected.
LCSSA-preserving SCEV expansion rewrites out-of-loop uses of
loop-defined bases to poison in predecessor-less blocks, corrupting
both the moved body and the scalar fallback clone.
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/213338
Adds codegen for the following AMDGCN tanh builtins:
- __builtin_amdgcn_tanhf (float)
- __builtin_amdgcn_tanhh (half)
- __builtin_amdgcn_tanh_bf16 (bfloat16)
These are lowered to the corresponding `llvm.amdgcn.tanh` intrinsic.
Adds codegen for the following AMDGCN trigonometric pre-operation
builtins:
- __builtin_amdgcn_trig_preop (double)
- __builtin_amdgcn_trig_preopf (float)
These are lowered to the corresponding `llvm.amdgcn.trig.preop`
intrinsic.
Follow-up to #212417, another one in the same corner.
`llc -mtriple=x86_64-pc-windows-msvc` crashes on a function whose
personality isn't a function:
```llvm
define void @a() personality ptr null {
ret void
}
```
`dyn_cast<Function>` gives null, and `beginFunclet` hands that straight
to `getSymbol`, which dereferences it.
`DwarfCFIException` already guards against this, applying the null check
to both branches:
```cpp
shouldEmitPersonality =
(forceEmitPersonality ||
(hasLandingPads && PerEncoding != dwarf::DW_EH_PE_omit)) && Per;
```
`WinException` has it inside the second operand, so
`forceEmitPersonality` bypasses it. Move it out so it gates both,
matching the Dwarf path.
The test covers both directions: the null personality no longer emits a
handler, and a real personality with a landing pad still emits
`.seh_handler __CxxFrameHandler3` as before. `CodeGen/WinEH` is 19/19.
Fixes#210285
