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feat: Add big screen patches for Nvidia-open driver (#593)
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Kyle Gospodnetich
GitHub
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2 changed files with 132 additions and 0 deletions
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@ -0,0 +1,86 @@
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From bf3bf757f5131d8d90f3adf4cb2e8599840f1700 Mon Sep 17 00:00:00 2001
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From: triple-groove <triple-groove@users.noreply.github.com>
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Date: Sun, 22 Feb 2026 16:07:56 -0800
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Subject: [PATCH 1/4] fix(dsc): correct RC parameter tables to match VESA DSC
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1.1 standard
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The minqp444_8b, maxqp444_8b, and ofs_und8 tables in nvt_dsc_pps.c
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contain non-standard values for the 8bpc / 8.0 bpp operating point
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(column index 4). Ranges 9-14 have more constrained max_qp values
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than the VESA DSC 1.1 specification (Table E-5), and range 11 has
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an incorrect bpg_offset.
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These deviations prevent the DSC encoder from quantizing aggressively
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enough when the RC buffer approaches overflow on complex content,
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causing visible block/tile "rainbow static" artifacts on sinks that
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implement strict VESA-compliant DSC decompression.
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Corrected values (all at column index 4 = 8.0 bpp):
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minqp444_8b range 9: 4 -> 3
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minqp444_8b range 13: 8 -> 7
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minqp444_8b range 14: 12 -> 13
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maxqp444_8b range 10: 10 -> 11
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maxqp444_8b range 11: 11 -> 12
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maxqp444_8b range 12: 11 -> 13
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maxqp444_8b range 13: 12 -> 13
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maxqp444_8b range 14: 13 -> 15
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ofs_und8 range 11: -10 -> -12
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Tested on RTX 5090 with Bigscreen Beyond VR headset (DSC 1.1, 8bpc,
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8.0 bpp, RGB 4:4:4, 3840x1920@90Hz). Artifacts completely eliminated.
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Signed-off-by: triple-groove <triple-groove@users.noreply.github.com>
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---
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src/common/modeset/timing/nvt_dsc_pps.c | 18 +++++++++---------
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1 file changed, 9 insertions(+), 9 deletions(-)
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diff --git a/src/common/modeset/timing/nvt_dsc_pps.c b/src/common/modeset/timing/nvt_dsc_pps.c
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index 0f6ba54..94e33b4 100644
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--- a/src/common/modeset/timing/nvt_dsc_pps.c
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+++ b/src/common/modeset/timing/nvt_dsc_pps.c
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@@ -191,12 +191,12 @@ static const NvU8 minqp444_8b[15][37]={
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,{ 5, 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0}
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,{ 5, 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0}
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,{ 5, 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 0, 0, 0}
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- ,{ 6, 5, 5, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 0, 0, 0}
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+ ,{ 6, 5, 5, 4, 3, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 0, 0, 0} // [9] col4: 4->3 (VESA DSC 1.1)
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,{ 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 0}
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,{ 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 0}
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,{ 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 0}
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- ,{ 9, 9, 9, 9, 8, 8, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 5, 5, 5, 5, 4, 4, 3, 3, 3, 3, 2, 2, 1, 1, 1}
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- ,{14,14,13,13,12,12,12,12,11,11,10,10,10,10, 9, 9, 9, 8, 8, 8, 7, 7, 7, 7, 6, 6, 5, 5, 5, 5, 4, 4, 4, 3, 3, 3, 3}
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+ ,{ 9, 9, 9, 9, 7, 8, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 5, 5, 5, 5, 4, 4, 3, 3, 3, 3, 2, 2, 1, 1, 1} // [13] col4: 8->7 (VESA DSC 1.1)
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+ ,{14,14,13,13,13,12,12,12,11,11,10,10,10,10, 9, 9, 9, 8, 8, 8, 7, 7, 7, 7, 6, 6, 5, 5, 5, 5, 4, 4, 4, 3, 3, 3, 3} // [14] col4: 12->13 (VESA DSC 1.1)
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};
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static const NvU8 maxqp444_8b[15][37]={
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@@ -210,11 +210,11 @@ static const NvU8 maxqp444_8b[15][37]={
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,{10,10, 9, 9, 8, 8, 8, 8, 8, 8, 8, 8, 8, 7, 7, 6, 5, 5, 4, 4, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1}
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,{11,11,10,10, 9, 9, 9, 9, 9, 9, 8, 8, 8, 7, 7, 6, 6, 5, 5, 5, 5, 5, 4, 4, 4, 4, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1}
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,{12,11,11,10,10,10, 9, 9, 9, 9, 9, 9, 9, 8, 8, 7, 6, 6, 5, 5, 5, 5, 4, 4, 4, 4, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1}
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- ,{12,12,11,11,10,10,10,10,10,10, 9, 9, 9, 8, 8, 7, 7, 6, 6, 6, 5, 5, 4, 4, 4, 4, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1}
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- ,{12,12,12,11,11,11,10,10,10,10, 9, 9, 9, 9, 8, 8, 8, 7, 7, 7, 6, 6, 5, 5, 5, 5, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 1}
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- ,{12,12,12,12,11,11,11,11,11,10,10, 9, 9, 9, 8, 8, 8, 7, 7, 7, 6, 6, 5, 5, 5, 5, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 1}
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- ,{13,13,13,13,12,12,11,11,11,11,10,10,10,10, 9, 9, 8, 8, 8, 8, 7, 7, 6, 6, 6, 6, 5, 5, 4, 4, 4, 4, 3, 3, 2, 2, 2}
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- ,{15,15,14,14,13,13,13,13,12,12,11,11,11,11,10,10,10, 9, 9, 9, 8, 8, 8, 8, 7, 7, 6, 6, 6, 6, 5, 5, 5, 4, 4, 4, 4}
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+ ,{12,12,11,11,11,10,10,10,10,10, 9, 9, 9, 8, 8, 7, 7, 6, 6, 6, 5, 5, 4, 4, 4, 4, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1} // [10] col4: 10->11 (VESA DSC 1.1)
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+ ,{12,12,12,11,12,11,10,10,10,10, 9, 9, 9, 9, 8, 8, 8, 7, 7, 7, 6, 6, 5, 5, 5, 5, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 1} // [11] col4: 11->12 (VESA DSC 1.1)
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+ ,{12,12,12,12,13,11,11,11,11,10,10, 9, 9, 9, 8, 8, 8, 7, 7, 7, 6, 6, 5, 5, 5, 5, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 1} // [12] col4: 11->13 (VESA DSC 1.1)
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+ ,{13,13,13,13,13,12,11,11,11,11,10,10,10,10, 9, 9, 8, 8, 8, 8, 7, 7, 6, 6, 6, 6, 5, 5, 4, 4, 4, 4, 3, 3, 2, 2, 2} // [13] col4: 12->13 (VESA DSC 1.1)
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+ ,{15,15,14,14,15,13,13,13,12,12,11,11,11,11,10,10,10, 9, 9, 9, 8, 8, 8, 8, 7, 7, 6, 6, 6, 6, 5, 5, 5, 4, 4, 4, 4} // [14] col4: 13->15 (VESA DSC 1.1)
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};
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static const NvU8 minqp444_10b[15][49]={
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@@ -938,7 +938,7 @@ DSC_PpsCalcRcParam
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//else
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{
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const NvU32 ofs_und6[] = { 0, -2, -2, -4, -6, -6, -8, -8, -8, -10, -10, -12, -12, -12, -12 };
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- const NvU32 ofs_und8[] = { 2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -10, -12, -12, -12 };
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+ const NvU32 ofs_und8[] = { 2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -12, -12, -12, -12 }; // [11]: -10->-12 (VESA DSC 1.1)
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const NvU32 ofs_und12[] = { 2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -10, -12, -12, -12 };
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const NvU32 ofs_und15[] = { 10, 8, 6, 4, 2, 0, -2, -4, -6, -8, -10, -10, -12, -12, -12 };
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--
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2.53.0
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@ -0,0 +1,46 @@
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From fe1ed8b517445efed1cb64ec197f7e3a458a8191 Mon Sep 17 00:00:00 2001
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From: triple-groove <triple-groove@users.noreply.github.com>
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Date: Sun, 22 Feb 2026 16:08:46 -0800
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Subject: [PATCH 3/4] fix(dp): add Bigscreen Beyond VR headset to WAR database
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Add the Bigscreen Beyond (ManufacturerID 0x2709, ProductID 0x1234)
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to the DisplayPort workaround database. Force maximum link
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configuration (4 lanes HBR2) to ensure sufficient bandwidth through
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the BSB's DP-to-optical link box converter.
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Without this WAR, the driver may negotiate a lower link config that
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is borderline for the BSB's 3840x1920@90Hz DSC mode, causing
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intermittent link training failures.
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Signed-off-by: triple-groove <triple-groove@users.noreply.github.com>
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---
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src/common/displayport/src/dp_wardatabase.cpp | 13 +++++++++++++
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1 file changed, 13 insertions(+)
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diff --git a/src/common/displayport/src/dp_wardatabase.cpp b/src/common/displayport/src/dp_wardatabase.cpp
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index a205fab..04f1c62 100644
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--- a/src/common/displayport/src/dp_wardatabase.cpp
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+++ b/src/common/displayport/src/dp_wardatabase.cpp
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@@ -542,6 +542,19 @@ void Edid::applyEdidWorkArounds(NvU32 warFlag, const DpMonitorDenylistData *pDen
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}
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break;
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+ // Bigscreen Beyond VR headset
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+ case 0x2709:
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+ if (ProductID == 0x1234)
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+ {
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+ //
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+ // The Bigscreen Beyond connects via a link box (DP -> optical).
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+ // Force 4 lanes HBR2 to ensure sufficient bandwidth.
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+ //
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+ this->WARFlags.forceMaxLinkConfig = true;
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+ DP_PRINTF(DP_NOTICE, "DP-WAR> Force maximum link config for Bigscreen Beyond VR headset.");
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+ }
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+ break;
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+
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// CMN
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case 0xAE0D:
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if (ProductID == 0x1747)
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--
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2.53.0
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