[InstSimplify] Fold zext(X) | sext(X) --> sext(X) and zext(X) & sext(X) --> zext(X) (#213313)
fix #213247 alive2: https://alive2.llvm.org/ce/z/G6se2o godbolt: https://godbolt.org/z/M3nz5Tvcn
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Vachan
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3 changed files with 222 additions and 0 deletions
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@ -2135,6 +2135,16 @@ static Value *simplifyAndInst(Value *Op0, Value *Op1, const SimplifyQuery &Q,
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if (Value *V = simplifyAndOrOfCmps(Q, Op0, Op1, true))
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return V;
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// zext(X) & sext(X) --> zext(X)
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// sext(X) & zext(X) --> zext(X)
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{
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Value *X = nullptr;
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if (match(Op0, m_ZExt(m_Value(X))) && match(Op1, m_SExt(m_Specific(X))))
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return Op0;
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if (match(Op1, m_ZExt(m_Value(X))) && match(Op0, m_SExt(m_Specific(X))))
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return Op1;
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}
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// Try some generic simplifications for associative operations.
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if (Value *V =
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simplifyAssociativeBinOp(Instruction::And, Op0, Op1, Q, MaxRecurse))
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@ -2388,6 +2398,16 @@ static Value *simplifyOrInst(Value *Op0, Value *Op1, const SimplifyQuery &Q,
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}
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}
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// zext(X) | sext(X) --> sext(X)
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// sext(X) | zext(X) --> sext(X)
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{
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Value *X = nullptr;
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if (match(Op0, m_ZExt(m_Value(X))) && match(Op1, m_SExt(m_Specific(X))))
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return Op1;
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if (match(Op1, m_ZExt(m_Value(X))) && match(Op0, m_SExt(m_Specific(X))))
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return Op0;
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}
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// A funnel shift (rotate) can be decomposed into simpler shifts. See if we
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// are mixing in another shift that is redundant with the funnel shift.
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101
llvm/test/Transforms/InstCombine/fold-and-zext-sext.ll
Normal file
101
llvm/test/Transforms/InstCombine/fold-and-zext-sext.ll
Normal file
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@ -0,0 +1,101 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -passes=instcombine -S | FileCheck %s
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declare void @use32(i32)
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define i32 @fold_zext_sext(i8 %x) {
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; CHECK-LABEL: @fold_zext_sext(
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; CHECK-NEXT: [[ZEXT:%.*]] = zext i8 [[X:%.*]] to i32
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; CHECK-NEXT: ret i32 [[ZEXT]]
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;
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%zext = zext i8 %x to i32
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%sext = sext i8 %x to i32
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%and = and i32 %zext, %sext
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ret i32 %and
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}
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define i32 @fold_zext_sext_commuted(i8 %x) {
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; CHECK-LABEL: @fold_zext_sext_commuted(
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; CHECK-NEXT: [[ZEXT:%.*]] = zext i8 [[X:%.*]] to i32
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; CHECK-NEXT: ret i32 [[ZEXT]]
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;
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%sext = sext i8 %x to i32
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%zext = zext i8 %x to i32
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%and = and i32 %sext, %zext
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ret i32 %and
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}
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define <4 x i32> @fold_zext_sext_vec(<4 x i16> %x) {
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; CHECK-LABEL: @fold_zext_sext_vec(
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; CHECK-NEXT: [[ZEXT:%.*]] = zext <4 x i16> [[X:%.*]] to <4 x i32>
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; CHECK-NEXT: ret <4 x i32> [[ZEXT]]
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;
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%zext = zext <4 x i16> %x to <4 x i32>
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%sext = sext <4 x i16> %x to <4 x i32>
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%and = and <4 x i32> %zext, %sext
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ret <4 x i32> %and
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}
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define i32 @multi_use_fold_zext_sext_1(i8 %x) {
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; CHECK-LABEL: @multi_use_fold_zext_sext_1(
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; CHECK-NEXT: [[ZEXT:%.*]] = zext i8 [[X:%.*]] to i32
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; CHECK-NEXT: call void @use32(i32 [[ZEXT]])
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; CHECK-NEXT: ret i32 [[ZEXT]]
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;
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%zext = zext i8 %x to i32
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%sext = sext i8 %x to i32
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call void @use32(i32 %zext)
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%and = and i32 %zext, %sext
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ret i32 %and
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}
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define i32 @multi_use_fold_zext_sext_2(i8 %x) {
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; CHECK-LABEL: @multi_use_fold_zext_sext_2(
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; CHECK-NEXT: [[ZEXT:%.*]] = zext i8 [[X:%.*]] to i32
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; CHECK-NEXT: [[SEXT:%.*]] = sext i8 [[X]] to i32
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; CHECK-NEXT: call void @use32(i32 [[SEXT]])
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; CHECK-NEXT: ret i32 [[ZEXT]]
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;
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%zext = zext i8 %x to i32
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%sext = sext i8 %x to i32
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call void @use32(i32 %sext)
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%and = and i32 %zext, %sext
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ret i32 %and
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}
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define i32 @neg_different_sources(i8 %x, i8 %y) {
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; CHECK-LABEL: @neg_different_sources(
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; CHECK-NEXT: [[ZEXT:%.*]] = zext i8 [[X:%.*]] to i32
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; CHECK-NEXT: [[SEXT:%.*]] = sext i8 [[Y:%.*]] to i32
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; CHECK-NEXT: [[R:%.*]] = and i32 [[ZEXT]], [[SEXT]]
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; CHECK-NEXT: ret i32 [[R]]
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;
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%zext = zext i8 %x to i32
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%sext = sext i8 %y to i32
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%and = and i32 %zext, %sext
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ret i32 %and
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}
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define i32 @neg_zext_only(i8 %x, i8 %y) {
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; CHECK-LABEL: @neg_zext_only(
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; CHECK-NEXT: [[R1:%.*]] = and i8 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[R:%.*]] = zext i8 [[R1]] to i32
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; CHECK-NEXT: ret i32 [[R]]
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;
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%z0 = zext i8 %x to i32
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%z1 = zext i8 %y to i32
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%and = and i32 %z0, %z1
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ret i32 %and
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}
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define i32 @neg_sext_only(i8 %x, i8 %y) {
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; CHECK-LABEL: @neg_sext_only(
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; CHECK-NEXT: [[R1:%.*]] = and i8 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[R:%.*]] = sext i8 [[R1]] to i32
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; CHECK-NEXT: ret i32 [[R]]
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;
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%s0 = sext i8 %x to i32
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%s1 = sext i8 %y to i32
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%and = and i32 %s0, %s1
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ret i32 %and
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}
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101
llvm/test/Transforms/InstCombine/fold-or-zext-sext.ll
Normal file
101
llvm/test/Transforms/InstCombine/fold-or-zext-sext.ll
Normal file
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@ -0,0 +1,101 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -passes=instcombine -S | FileCheck %s
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declare void @use32(i32)
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define i32 @fold_zext_sext(i8 %x) {
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; CHECK-LABEL: @fold_zext_sext(
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; CHECK-NEXT: [[SEXT:%.*]] = sext i8 [[X:%.*]] to i32
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; CHECK-NEXT: ret i32 [[SEXT]]
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;
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%zext = zext i8 %x to i32
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%sext = sext i8 %x to i32
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%or = or i32 %zext, %sext
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ret i32 %or
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}
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define i32 @fold_zext_sext_commuted(i8 %x) {
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; CHECK-LABEL: @fold_zext_sext_commuted(
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; CHECK-NEXT: [[SEXT:%.*]] = sext i8 [[X:%.*]] to i32
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; CHECK-NEXT: ret i32 [[SEXT]]
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;
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%sext = sext i8 %x to i32
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%zext = zext i8 %x to i32
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%or = or i32 %sext, %zext
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ret i32 %or
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}
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define <4 x i32> @fold_zext_sext_vec(<4 x i16> %x) {
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; CHECK-LABEL: @fold_zext_sext_vec(
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; CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i16> [[X:%.*]] to <4 x i32>
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; CHECK-NEXT: ret <4 x i32> [[SEXT]]
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;
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%zext = zext <4 x i16> %x to <4 x i32>
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%sext = sext <4 x i16> %x to <4 x i32>
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%or = or <4 x i32> %zext, %sext
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ret <4 x i32> %or
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}
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define i32 @multi_use_fold_zext_sext_1(i8 %x) {
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; CHECK-LABEL: @multi_use_fold_zext_sext_1(
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; CHECK-NEXT: [[ZEXT:%.*]] = zext i8 [[X:%.*]] to i32
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; CHECK-NEXT: [[SEXT:%.*]] = sext i8 [[X]] to i32
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; CHECK-NEXT: call void @use32(i32 [[ZEXT]])
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; CHECK-NEXT: ret i32 [[SEXT]]
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;
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%zext = zext i8 %x to i32
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%sext = sext i8 %x to i32
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call void @use32(i32 %zext)
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%or = or i32 %zext, %sext
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ret i32 %or
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}
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define i32 @multi_use_fold_zext_sext_2(i8 %x) {
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; CHECK-LABEL: @multi_use_fold_zext_sext_2(
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; CHECK-NEXT: [[SEXT:%.*]] = sext i8 [[X:%.*]] to i32
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; CHECK-NEXT: call void @use32(i32 [[SEXT]])
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; CHECK-NEXT: ret i32 [[SEXT]]
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;
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%zext = zext i8 %x to i32
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%sext = sext i8 %x to i32
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call void @use32(i32 %sext)
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%or = or i32 %zext, %sext
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ret i32 %or
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}
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define i32 @neg_different_sources(i8 %x, i8 %y) {
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; CHECK-LABEL: @neg_different_sources(
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; CHECK-NEXT: [[ZEXT:%.*]] = zext i8 [[X:%.*]] to i32
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; CHECK-NEXT: [[SEXT:%.*]] = sext i8 [[Y:%.*]] to i32
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; CHECK-NEXT: [[R:%.*]] = or i32 [[ZEXT]], [[SEXT]]
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; CHECK-NEXT: ret i32 [[R]]
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;
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%zext = zext i8 %x to i32
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%sext = sext i8 %y to i32
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%or = or i32 %zext, %sext
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ret i32 %or
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}
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define i32 @neg_zext_only(i8 %x, i8 %y) {
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; CHECK-LABEL: @neg_zext_only(
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; CHECK-NEXT: [[R1:%.*]] = or i8 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[R:%.*]] = zext i8 [[R1]] to i32
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; CHECK-NEXT: ret i32 [[R]]
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;
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%z0 = zext i8 %x to i32
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%z1 = zext i8 %y to i32
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%or = or i32 %z0, %z1
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ret i32 %or
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}
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define i32 @neg_sext_only(i8 %x, i8 %y) {
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; CHECK-LABEL: @neg_sext_only(
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; CHECK-NEXT: [[R1:%.*]] = or i8 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[R:%.*]] = sext i8 [[R1]] to i32
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; CHECK-NEXT: ret i32 [[R]]
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;
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%s0 = sext i8 %x to i32
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%s1 = sext i8 %y to i32
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%or = or i32 %s0, %s1
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ret i32 %or
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}
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