[lldb][RISCV] Fix x8 register aliasing for gdb-remote targets (#209070)
GDB remote target descriptions can expose the RISC-V `x8` register as `fp`. LLDB previously used `fp` as the primary name and `s0` as the alternate name, leaving no register name for `x8`. This commit changes `s0` as the primary name, `x8` as the alternate name, and mark the register as the generic frame pointer. Allowing `fp`, `s0`, and `x8` to resolve to the same register. Fixes #127900
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de44ed3488
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2 changed files with 9 additions and 8 deletions
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@ -820,7 +820,7 @@ static uint32_t GetGenericNum(llvm::StringRef name) {
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.Case("pc", LLDB_REGNUM_GENERIC_PC)
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.Cases({"ra", "x1"}, LLDB_REGNUM_GENERIC_RA)
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.Cases({"sp", "x2"}, LLDB_REGNUM_GENERIC_SP)
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.Cases({"fp", "s0"}, LLDB_REGNUM_GENERIC_FP)
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.Cases({"fp", "s0", "x8"}, LLDB_REGNUM_GENERIC_FP)
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.Cases({"tp", "x4"}, LLDB_REGNUM_GENERIC_TP)
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.Case("a0", LLDB_REGNUM_GENERIC_ARG1)
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.Case("a1", LLDB_REGNUM_GENERIC_ARG2)
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@ -847,9 +847,10 @@ void ABISysV_riscv::AugmentRegisterInfo(
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it.value().alt_name.SetCString("x2");
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else if (it.value().name == "gp")
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it.value().alt_name.SetCString("x3");
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else if (it.value().name == "fp")
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it.value().alt_name.SetCString("s0");
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else if (it.value().name == "tp")
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else if (it.value().name == "fp") {
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it.value().name.SetCString("s0");
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it.value().alt_name.SetCString("x8");
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} else if (it.value().name == "tp")
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it.value().alt_name.SetCString("x4");
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else if (it.value().name == "s0")
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it.value().alt_name.SetCString("x8");
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@ -668,7 +668,7 @@ class TestGDBServerTargetXML(GDBRemoteTestBase):
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"0102030405060708" # t0
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"0102030405060708" # t1
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"0102030405060708" # t2
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"0102030405060708" # fp
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"0102030405060708" # fp/s0
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"0102030405060708" # s1
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"0102030405060708" # a0
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"0102030405060708" # a1
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@ -780,9 +780,9 @@ class TestGDBServerTargetXML(GDBRemoteTestBase):
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self.match("register read x5", ["t0 = 0x0807060504030201"])
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self.match("register read x6", ["t1 = 0x0807060504030201"])
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self.match("register read x7", ["t2 = 0x0807060504030201"])
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# Register x8 is probably not working because it has two aliases fp, s0
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# See issue #127900
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# self.match("register read x8", ["fp = 0x0807060504030201"])
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self.match("register read fp", ["s0 = 0x0807060504030201"])
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self.match("register read s0", ["s0 = 0x0807060504030201"])
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self.match("register read x8", ["s0 = 0x0807060504030201"])
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self.match("register read x9", ["s1 = 0x0807060504030201"])
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self.match("register read x10", ["a0 = 0x0807060504030201"])
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self.match("register read x11", ["a1 = 0x0807060504030201"])
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