[DAG] SimplifyDemandedBits - remove ISD::FREEZE node if all demanded elements are not undef/poison (#198084)

Similar to what we already do in SimplifyDemandedVectorElts
This commit is contained in:
Simon Pilgrim 2026-05-16 14:43:23 +01:00 committed by GitHub
parent f5f4934305
commit 3f38dbae96
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2 changed files with 9 additions and 8 deletions

View file

@ -1258,6 +1258,13 @@ bool TargetLowering::SimplifyDemandedBits(
Known = KnownScl.trunc(BitWidth);
break;
}
case ISD::FREEZE: {
SDValue N0 = Op.getOperand(0);
if (TLO.DAG.isGuaranteedNotToBeUndefOrPoison(
N0, DemandedElts, UndefPoisonKind::UndefOrPoison, Depth + 1))
return TLO.CombineTo(Op, N0);
break;
}
case ISD::LOAD: {
auto *LD = cast<LoadSDNode>(Op);
if (getTargetConstantFromLoad(LD)) {

View file

@ -867,11 +867,8 @@ define i32 @freeze_ssubo(i32 %a0, i32 %a1, i8 %a2, i8 %a3) nounwind {
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: xorl %edx, %edx
; X86-NEXT: addb {{[0-9]+}}(%esp), %cl
; X86-NEXT: setb %dl
; X86-NEXT: movzbl %dl, %ecx
; X86-NEXT: subl %ecx, %eax
; X86-NEXT: sbbl $0, %eax
; X86-NEXT: subl {{[0-9]+}}(%esp), %eax
; X86-NEXT: retl
;
@ -899,11 +896,8 @@ define i32 @freeze_usubo(i32 %a0, i32 %a1, i8 %a2, i8 %a3) nounwind {
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: xorl %edx, %edx
; X86-NEXT: addb {{[0-9]+}}(%esp), %cl
; X86-NEXT: setb %dl
; X86-NEXT: movzbl %dl, %ecx
; X86-NEXT: subl %ecx, %eax
; X86-NEXT: sbbl $0, %eax
; X86-NEXT: subl {{[0-9]+}}(%esp), %eax
; X86-NEXT: retl
;