clang: Avoid hardcoding some offload triple strings (#193811)

This will make it easier to use the subarch field in the future.
This commit is contained in:
Matt Arsenault 2026-04-23 22:02:19 +01:00 committed by GitHub
parent 8ebc7307fa
commit 3cd4a795d9
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GPG key ID: B5690EEEBB952194
4 changed files with 34 additions and 19 deletions

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@ -152,15 +152,20 @@ OffloadArch StringToOffloadArch(llvm::StringRef S) {
llvm::Triple OffloadArchToTriple(const llvm::Triple &DefaultToolchainTriple,
OffloadArch ID) {
if (ID == OffloadArch::AMDGCNSPIRV)
return llvm::Triple("spirv64-amd-amdhsa");
return llvm::Triple(llvm::Triple::spirv64, llvm::Triple::NoSubArch,
llvm::Triple::AMD, llvm::Triple::AMDHSA);
if (IsNVIDIAOffloadArch(ID))
return DefaultToolchainTriple.isArch64Bit()
? llvm::Triple("nvptx64-nvidia-cuda")
: llvm::Triple("nvptx-nvidia-cuda");
if (IsNVIDIAOffloadArch(ID)) {
llvm::Triple::ArchType Arch = DefaultToolchainTriple.isArch64Bit()
? llvm::Triple::nvptx64
: llvm::Triple::nvptx;
return llvm::Triple(Arch, llvm::Triple::NoSubArch, llvm::Triple::NVIDIA,
llvm::Triple::CUDA);
}
if (IsAMDOffloadArch(ID))
return llvm::Triple("amdgcn-amd-amdhsa");
return llvm::Triple(llvm::Triple::amdgcn, llvm::Triple::NoSubArch,
llvm::Triple::AMD, llvm::Triple::AMDHSA);
return {};
}

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@ -108,7 +108,10 @@ void SPIRV64TargetInfo::getTargetDefines(const LangOptions &Opts,
DefineStd(Builder, "SPIRV64", Opts);
}
static const AMDGPUTargetInfo AMDGPUTI(llvm::Triple("amdgcn-amd-amdhsa"), {});
static const AMDGPUTargetInfo
AMDGPUTI(llvm::Triple(llvm::Triple::amdgcn, llvm::Triple::NoSubArch,
llvm::Triple::AMD, llvm::Triple::AMDHSA),
{});
ArrayRef<const char *> SPIRV64AMDGCNTargetInfo::getGCCRegNames() const {
return AMDGPUTI.getGCCRegNames();

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@ -973,8 +973,10 @@ static TripleSet inferOffloadToolchains(Compilation &C,
for (llvm::StringRef Arch : Archs) {
OffloadArch ID = StringToOffloadArch(Arch);
if (ID == OffloadArch::Unknown)
ID = StringToOffloadArch(
getProcessorFromTargetID(llvm::Triple("amdgcn-amd-amdhsa"), Arch));
ID = StringToOffloadArch(getProcessorFromTargetID(
llvm::Triple(llvm::Triple::amdgcn, llvm::Triple::NoSubArch,
llvm::Triple::AMD, llvm::Triple::AMDHSA),
Arch));
if (Kind == Action::OFK_HIP && !IsAMDOffloadArch(ID)) {
C.getDriver().Diag(clang::diag::err_drv_offload_bad_gpu_arch)
@ -1020,17 +1022,20 @@ static TripleSet inferOffloadToolchains(Compilation &C,
// Infer the default target triple if no specific architectures are given.
if (Archs.empty() && Kind == Action::OFK_HIP)
Triples.insert(llvm::Triple("amdgcn-amd-amdhsa"));
else if (Archs.empty() && Kind == Action::OFK_Cuda)
Triples.insert(llvm::Triple(llvm::Triple::amdgcn, llvm::Triple::NoSubArch,
llvm::Triple::AMD, llvm::Triple::AMDHSA));
else if (Archs.empty() && Kind == Action::OFK_Cuda) {
llvm::Triple::ArchType Arch =
C.getDefaultToolChain().getTriple().isArch64Bit()
? llvm::Triple::nvptx64
: llvm::Triple::nvptx;
Triples.insert(llvm::Triple(Arch, llvm::Triple::NoSubArch,
llvm::Triple::NVIDIA, llvm::Triple::CUDA));
} else if (Archs.empty() && Kind == Action::OFK_SYCL)
Triples.insert(
llvm::Triple(C.getDefaultToolChain().getTriple().isArch64Bit()
? "nvptx64-nvidia-cuda"
: "nvptx-nvidia-cuda"));
else if (Archs.empty() && Kind == Action::OFK_SYCL)
Triples.insert(
llvm::Triple(C.getDefaultToolChain().getTriple().isArch64Bit()
? "spirv64-unknown-unknown"
: "spirv32-unknown-unknown"));
? llvm::Triple::spirv64
: llvm::Triple::spirv32));
// We need to dispatch these to the appropriate toolchain now.
C.getArgs().eraseArg(options::OPT_offload_arch_EQ);

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@ -1024,7 +1024,9 @@ bool DiagnoseUnguardedBuiltins::VisitCallExpr(CallExpr *CE) {
for (auto &&F : llvm::split(BInfo.getRequiredFeatures(GID), ','))
FeatureMap[F] = true;
} else {
static const llvm::Triple AMDGCN("amdgcn-amd-amdhsa");
static const llvm::Triple AMDGCN(llvm::Triple::amdgcn,
llvm::Triple::NoSubArch, llvm::Triple::AMD,
llvm::Triple::AMDHSA);
llvm::AMDGPU::fillAMDGPUFeatureMap(CurrentGFXIP.back().second, AMDGCN,
FeatureMap);
}