[RISCV][GlobalISel] Legalize G_ATOMICRMW_MAX/MIN/UMAX/UMIN (#210891)
Add a legalizer rule that marks these legal at `sXLen` under `+a`
(selecting `amomax.w/d`, and `amomax.b/h` for sub-word under `+zabha`
via the existing widen-scalar-while-preserving-the-memoperand path), and
handle the `llvm.riscv.masked.atomicrmw.{max,min,umax,umin}` intrinsics
the same way as `add/sub/xchg` so sub-word values without `+zabha` use
the LR/SC masking pseudos. There is no `__atomic_fetch_max/min` libcall,
so unlike `add/and/or/xor` the rule does not libcall the no-A case; that
case is already lowered by an IR-level compare-exchange loop and never
reaches GlobalISel, so the rule marks it unsupported to keep the rule
set well-defined.
Updates `legalizer-info-validation.mir` for the newly defined rules and
adds `atomicrmw-max-min-umax-umin.ll`.
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3 changed files with 13089 additions and 8 deletions
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@ -748,6 +748,12 @@ RISCVLegalizerInfo::RISCVLegalizerInfo(const RISCVSubtarget &ST)
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.clampScalar(0, sXLen, sXLen)
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.lower();
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getActionDefinitionsBuilder(
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{G_ATOMICRMW_MAX, G_ATOMICRMW_MIN, G_ATOMICRMW_UMAX, G_ATOMICRMW_UMIN})
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.legalFor(ST.hasStdExtA(), {{sXLen, p0}})
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.clampScalar(0, sXLen, sXLen)
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.unsupported();
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LegalityPredicate InsertVectorEltPred = [=](const LegalityQuery &Query) {
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LLT VecTy = Query.Types[0];
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LLT EltTy = Query.Types[1];
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@ -833,6 +839,10 @@ bool RISCVLegalizerInfo::legalizeIntrinsic(LegalizerHelper &Helper,
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case Intrinsic::riscv_masked_atomicrmw_add:
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case Intrinsic::riscv_masked_atomicrmw_sub:
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case Intrinsic::riscv_masked_atomicrmw_xchg:
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case Intrinsic::riscv_masked_atomicrmw_max:
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case Intrinsic::riscv_masked_atomicrmw_min:
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case Intrinsic::riscv_masked_atomicrmw_umax:
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case Intrinsic::riscv_masked_atomicrmw_umin:
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case Intrinsic::riscv_masked_cmpxchg:
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return true;
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}
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13068
llvm/test/CodeGen/RISCV/GlobalISel/atomicrmw-max-min-umax-umin.ll
Normal file
13068
llvm/test/CodeGen/RISCV/GlobalISel/atomicrmw-max-min-umax-umin.ll
Normal file
File diff suppressed because it is too large
Load diff
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@ -267,17 +267,20 @@
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# DEBUG-NEXT: .. the first uncovered type index: 2, OK
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# DEBUG-NEXT: .. the first uncovered imm index: 0, OK
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# DEBUG-NEXT: G_ATOMICRMW_MAX (opcode {{[0-9]+}}): 2 type indices, 0 imm indices
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# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: .. type index coverage check SKIPPED: user-defined predicate detected
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# DEBUG-NEXT: .. imm index coverage check SKIPPED: user-defined predicate detected
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# DEBUG-NEXT: G_ATOMICRMW_MIN (opcode {{[0-9]+}}): 2 type indices, 0 imm indices
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# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: .. opcode {{[0-9]+}} is aliased to {{[0-9]+}}
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# DEBUG-NEXT: .. type index coverage check SKIPPED: user-defined predicate detected
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# DEBUG-NEXT: .. imm index coverage check SKIPPED: user-defined predicate detected
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# DEBUG-NEXT: G_ATOMICRMW_UMAX (opcode {{[0-9]+}}): 2 type indices, 0 imm indices
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# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: .. opcode {{[0-9]+}} is aliased to {{[0-9]+}}
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# DEBUG-NEXT: .. type index coverage check SKIPPED: user-defined predicate detected
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# DEBUG-NEXT: .. imm index coverage check SKIPPED: user-defined predicate detected
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# DEBUG-NEXT: G_ATOMICRMW_UMIN (opcode {{[0-9]+}}): 2 type indices, 0 imm indices
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# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: .. opcode {{[0-9]+}} is aliased to {{[0-9]+}}
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# DEBUG-NEXT: .. type index coverage check SKIPPED: user-defined predicate detected
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# DEBUG-NEXT: .. imm index coverage check SKIPPED: user-defined predicate detected
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# DEBUG-NEXT: G_ATOMICRMW_FADD (opcode {{[0-9]+}}): 2 type indices
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# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
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