Emit debug type vector (#200056)
This emits `DebugTypeVector` for HLSL `float4`-style vectors. `partitionTypes()` separates vector `DICompositeType` nodes from basic types so both can be visited in a single pass over the debug metadata. A new `emitDebugTypeVector()` helper builds the `DebugTypeVector` instruction and looks up the base-type register in `DebugTypeRegs`. The helper skips four cases silently: 1. Absent or non-`DIBasicType` base type: only scalar element types are supported for now. 2. Base type not yet emitted: the type was not reached during the `DebugTypeBasic` pass. 3. Multiple subranges: `DebugTypeVector` models one-dimensional vectors only (NSDI cannot encode multi-subrange types). 4. Non-constant subrange count: NSDI cannot represent variable-length counts. Added a new test in `test/CodeGen/SPIRV/debug-info/debug-type-vector.ll`.
This commit is contained in:
Diego Novillo
GitHub
parent
274331053c
commit
056b4a71c0
4 changed files with 195 additions and 8 deletions
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@ -27,15 +27,17 @@ using namespace llvm;
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namespace {
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/// Partition \p Ty into \p BasicTypes, \p PointerTypes, and \p SubroutineTypes
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/// for NSDI emission. Used when iterating DebugInfoFinder.types(); each DI
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/// node is seen once, so no recursion into pointer bases. Other composites and
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/// non-pointer derived kinds are ignored because they are not yet supported.
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/// Only types that are supported (later used) are partitioned.
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/// Partition \p Ty into \p BasicTypes, \p PointerTypes, \p SubroutineTypes,
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/// and \p VectorTypes for NSDI emission. Used when iterating
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/// DebugInfoFinder.types(); each DI node is seen once, so no recursion into
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/// pointer bases. Other composites and non-pointer derived kinds are ignored
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/// because they are not yet supported. Only types that are supported (later
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/// used) are partitioned.
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static void
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partitionTypes(const DIType *Ty, SmallVector<const DIBasicType *> &BasicTypes,
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SmallVector<const DIDerivedType *> &PointerTypes,
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SmallVector<const DISubroutineType *> &SubroutineTypes) {
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SmallVector<const DISubroutineType *> &SubroutineTypes,
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SmallVector<const DICompositeType *> &VectorTypes) {
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if (const auto *BT = dyn_cast<DIBasicType>(Ty)) {
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BasicTypes.push_back(BT);
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return;
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@ -44,6 +46,11 @@ partitionTypes(const DIType *Ty, SmallVector<const DIBasicType *> &BasicTypes,
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SubroutineTypes.push_back(ST);
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return;
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}
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if (const auto *CT = dyn_cast<DICompositeType>(Ty)) {
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if (CT->getTag() == dwarf::DW_TAG_array_type && CT->isVector())
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VectorTypes.push_back(CT);
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return;
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}
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const auto *DT = dyn_cast<DIDerivedType>(Ty);
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if (DT && DT->getTag() == dwarf::DW_TAG_pointer_type)
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PointerTypes.push_back(DT);
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@ -173,6 +180,7 @@ void SPIRVNonSemanticDebugHandler::beginModule(Module *M) {
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BasicTypes.clear();
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PointerTypes.clear();
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SubroutineTypes.clear();
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VectorTypes.clear();
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DebugTypeRegs.clear();
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OpStringContentCache.clear();
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I32ConstantCache.clear();
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@ -218,7 +226,7 @@ void SPIRVNonSemanticDebugHandler::beginModule(Module *M) {
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DebugInfoFinder Finder;
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Finder.processModule(*M);
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llvm::for_each(Finder.types(), [&](DIType *Ty) {
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partitionTypes(Ty, BasicTypes, PointerTypes, SubroutineTypes);
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partitionTypes(Ty, BasicTypes, PointerTypes, SubroutineTypes, VectorTypes);
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});
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}
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@ -460,6 +468,34 @@ std::optional<MCRegister> SPIRVNonSemanticDebugHandler::mapDISignatureTypeToReg(
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return std::nullopt;
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}
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std::optional<MCRegister> SPIRVNonSemanticDebugHandler::emitDebugTypeVector(
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const DICompositeType *VT, MCRegister ExtInstSetReg,
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SPIRV::ModuleAnalysisInfo &MAI) {
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const auto *BaseTy = dyn_cast_or_null<DIBasicType>(VT->getBaseType());
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if (!BaseTy)
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return std::nullopt;
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auto BTIt = DebugTypeRegs.find(BaseTy);
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if (BTIt == DebugTypeRegs.end())
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return std::nullopt;
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// DebugTypeVector models only 1D vectors (multi-subrange types cannot be
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// encoded).
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DINodeArray Elements = VT->getElements();
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if (Elements.size() != 1)
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return std::nullopt;
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const auto *SR = cast<DISubrange>(Elements[0]);
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const auto *CI = dyn_cast_if_present<ConstantInt *>(SR->getCount());
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if (!CI)
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return std::nullopt;
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MCRegister VoidTypeReg = getOrEmitOpTypeVoidReg(MAI);
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MCRegister I32TypeReg = getOrEmitOpTypeInt32Reg(MAI);
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MCRegister CountReg = emitOpConstantI32(
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static_cast<uint32_t>(CI->getZExtValue()), I32TypeReg, MAI);
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return emitExtInst(SPIRV::NonSemanticExtInst::DebugTypeVector, VoidTypeReg,
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ExtInstSetReg, {BTIt->second, CountReg}, MAI);
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}
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void SPIRVNonSemanticDebugHandler::emitNonSemanticDebugStrings(
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SPIRV::ModuleAnalysisInfo &MAI) {
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if (CompileUnits.empty())
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@ -587,6 +623,12 @@ void SPIRVNonSemanticDebugHandler::emitNonSemanticGlobalDebugInfo(
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DebugTypeRegs[BT] = BTReg;
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}
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// Emit DebugTypeVector for each collected vector type.
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for (const DICompositeType *VT : VectorTypes) {
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if (auto VecReg = emitDebugTypeVector(VT, ExtInstSetReg, MAI))
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DebugTypeRegs[VT] = *VecReg;
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}
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// Emit DebugTypePointer for each referenced pointer type.
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for (const DIDerivedType *PT : PointerTypes) {
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if (auto PtrReg = emitDebugTypePointer(PT, ExtInstSetReg, MAI))
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@ -61,10 +61,13 @@ class SPIRVNonSemanticDebugHandler : public DebugHandlerBase {
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int64_t DwarfVersion = 0;
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// DI types partitioned from DebugInfoFinder.types() in beginModule()
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// (basics, pointers, subroutine types NSDI v1 may emit).
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// (basics, pointers, vectors, subroutine types NSDI v1 may emit).
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SmallVector<const DIBasicType *> BasicTypes;
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SmallVector<const DIDerivedType *> PointerTypes;
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SmallVector<const DISubroutineType *> SubroutineTypes;
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// DICompositeType nodes with DW_TAG_array_type and DINode::FlagVector,
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// partitioned from DebugInfoFinder.types() in beginModule().
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SmallVector<const DICompositeType *> VectorTypes;
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// Filled in emitNonSemanticGlobalDebugInfo(): DI types to their result
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// registers.
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@ -216,6 +219,16 @@ private:
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MCRegister ExtInstSetReg,
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SPIRV::ModuleAnalysisInfo &MAI);
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/// Emit \c DebugTypeVector for the vector composite type \p VT.
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///
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/// \returns The result id register on success. Returns \c std::nullopt and
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/// emits nothing if \p VT has no \c DIBasicType base type, if the base type
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/// has not been emitted yet, if \p VT has more than one \c DISubrange
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/// element, or if the component count is not a compile-time constant.
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std::optional<MCRegister> emitDebugTypeVector(const DICompositeType *VT,
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MCRegister ExtInstSetReg,
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SPIRV::ModuleAnalysisInfo &MAI);
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/// Map a \c DISubroutineType::getTypeArray() element to an operand register
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/// for
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/// \c DebugTypeFunction. Non-null \p Ty resolves via \c DebugTypeRegs; if the
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@ -0,0 +1,66 @@
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; RUN: llc --verify-machineinstrs --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s
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; RUN: %if spirv-tools %{ llc --verify-machineinstrs --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
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; Verify that DICompositeType vector nodes that cannot be lowered to
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; DebugTypeVector are silently skipped. Four conditions trigger the skip:
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; 1. No base type (getBaseType() returns null).
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; 2. Non-DIBasicType base type (struct type as element type).
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; 3. More than one DISubrange element (multi-dimensional array shape).
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; 4. Non-constant subrange count (DILocalVariable used as component count).
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;
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; None of the four vectors below should produce a DebugTypeVector instruction.
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; CHECK-NOT: DebugTypeVector
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define spir_func void @test() !dbg !6 {
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entry:
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%v1 = alloca <4 x float>, align 16
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%v2 = alloca <4 x float>, align 16
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%v3 = alloca <4 x i32>, align 16
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%v4 = alloca <4 x i64>, align 32
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#dbg_declare(ptr %v1, !10, !DIExpression(), !30)
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#dbg_declare(ptr %v2, !12, !DIExpression(), !30)
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#dbg_declare(ptr %v3, !15, !DIExpression(), !30)
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#dbg_declare(ptr %v4, !20, !DIExpression(), !30)
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ret void
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}
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!llvm.dbg.cu = !{!0}
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!llvm.module.flags = !{!2, !3}
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!0 = distinct !DICompileUnit(language: DW_LANG_HLSL, file: !1, producer: "clang", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug)
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!1 = !DIFile(filename: "skip.hlsl", directory: "/src")
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!2 = !{i32 7, !"Dwarf Version", i32 5}
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!3 = !{i32 2, !"Debug Info Version", i32 3}
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!4 = !DISubroutineType(types: !5)
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!5 = !{null}
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!6 = distinct !DISubprogram(name: "test", scope: !1, file: !1, line: 1, type: !4, scopeLine: 1, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !0, retainedNodes: !9)
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!9 = !{}
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; Case 1: vector with no base type -- skipped at dyn_cast_or_null<DIBasicType>.
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!10 = !DILocalVariable(name: "v1", scope: !6, file: !1, line: 2, type: !11)
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!11 = !DICompositeType(tag: DW_TAG_array_type, size: 128, flags: DIFlagVector, elements: !29)
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; Case 2: vector with non-DIBasicType base (struct) -- dyn_cast_or_null<DIBasicType>
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; returns null, so skipped at the same check as case 1.
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!12 = !DILocalVariable(name: "v2", scope: !6, file: !1, line: 3, type: !13)
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!13 = !DICompositeType(tag: DW_TAG_array_type, baseType: !14, size: 128, flags: DIFlagVector, elements: !29)
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!14 = !DICompositeType(tag: DW_TAG_structure_type, name: "S", file: !1, size: 32)
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; Case 3: vector with multiple subranges -- skipped at Elements.size() != 1.
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!15 = !DILocalVariable(name: "v3", scope: !6, file: !1, line: 4, type: !16)
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!16 = !DICompositeType(tag: DW_TAG_array_type, baseType: !17, size: 128, flags: DIFlagVector, elements: !18)
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!17 = !DIBasicType(name: "uint", size: 32, encoding: DW_ATE_unsigned)
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!18 = !{!DISubrange(count: 4), !DISubrange(count: 4)}
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; Case 4: vector with a non-constant subrange count (DILocalVariable) --
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; skipped at dyn_cast_if_present<ConstantInt *>.
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!20 = !DILocalVariable(name: "v4", scope: !6, file: !1, line: 5, type: !21)
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!21 = !DICompositeType(tag: DW_TAG_array_type, baseType: !22, size: 256, flags: DIFlagVector, elements: !27)
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!22 = !DIBasicType(name: "int64", size: 64, encoding: DW_ATE_signed)
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!23 = !DILocalVariable(name: "n", scope: !6, file: !1, line: 1, type: !24)
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!24 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
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!27 = !{!DISubrange(count: !23)}
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!29 = !{!DISubrange(count: 4)}
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!30 = !DILocation(line: 2, column: 1, scope: !6)
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66
llvm/test/CodeGen/SPIRV/debug-info/debug-type-vector.ll
Normal file
66
llvm/test/CodeGen/SPIRV/debug-info/debug-type-vector.ll
Normal file
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@ -0,0 +1,66 @@
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; RUN: llc --verify-machineinstrs --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
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; RUN: %if spirv-tools %{ llc --verify-machineinstrs --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
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; Verify that DICompositeType nodes with tag DW_TAG_array_type and the
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; DIFlagVector flag lower to DebugTypeVector. Three element widths exercise
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; the OpConstant cache: a 4-component float vector and a 3-component float
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; vector share the float DebugTypeBasic but have distinct component-count
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; constants, while a 4-component int vector reuses the OpConstant 4 already
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; emitted for the float4.
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;
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; The OpConstant cache merges values across uses. OpConstant 3 is emitted
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; once and shared between the float DebugTypeBasic's Encoding operand (3 =
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; Float, NSDI 4.5) and the 3-component vector's ComponentCount operand.
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; Likewise OpConstant 4 is shared between the int DebugTypeBasic's Encoding
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; (4 = Signed) and the 4-component vector's ComponentCount.
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; CHECK-SPIRV: [[ext_inst_non_semantic:%[0-9]+]] = OpExtInstImport "NonSemantic.Shader.DebugInfo.100"
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; CHECK-SPIRV-DAG: [[type_void:%[0-9]+]] = OpTypeVoid
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; CHECK-SPIRV-DAG: [[type_int32:%[0-9]+]] = OpTypeInt 32 0
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; CHECK-SPIRV-DAG: [[str_float:%[0-9]+]] = OpString "float"
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; CHECK-SPIRV-DAG: [[str_int:%[0-9]+]] = OpString "int"
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; CHECK-SPIRV-DAG: [[size_32bit:%[0-9]+]] = OpConstant [[type_int32]] 32{{$}}
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; CHECK-SPIRV-DAG: [[flag_zero:%[0-9]+]] = OpConstant [[type_int32]] 0{{$}}
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; CHECK-SPIRV-DAG: [[const_3:%[0-9]+]] = OpConstant [[type_int32]] 3{{$}}
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; CHECK-SPIRV-DAG: [[const_4:%[0-9]+]] = OpConstant [[type_int32]] 4{{$}}
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; CHECK-SPIRV-DAG: [[basic_float:%[0-9]+]] = OpExtInst [[type_void]] [[ext_inst_non_semantic]] DebugTypeBasic [[str_float]] [[size_32bit]] [[const_3]] [[flag_zero]]
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; CHECK-SPIRV-DAG: [[basic_int:%[0-9]+]] = OpExtInst [[type_void]] [[ext_inst_non_semantic]] DebugTypeBasic [[str_int]] [[size_32bit]] [[const_4]] [[flag_zero]]
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; CHECK-SPIRV-DAG: OpExtInst [[type_void]] [[ext_inst_non_semantic]] DebugTypeVector [[basic_float]] [[const_4]]
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; CHECK-SPIRV-DAG: OpExtInst [[type_void]] [[ext_inst_non_semantic]] DebugTypeVector [[basic_float]] [[const_3]]
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; CHECK-SPIRV-DAG: OpExtInst [[type_void]] [[ext_inst_non_semantic]] DebugTypeVector [[basic_int]] [[const_4]]
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define spir_func void @test() !dbg !6 {
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entry:
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%f4 = alloca <4 x float>, align 16
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%f3 = alloca <3 x float>, align 16
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%i4 = alloca <4 x i32>, align 16
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#dbg_declare(ptr %f4, !10, !DIExpression(), !14)
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#dbg_declare(ptr %f3, !15, !DIExpression(), !17)
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#dbg_declare(ptr %i4, !18, !DIExpression(), !22)
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ret void
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}
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!llvm.dbg.cu = !{!0}
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!llvm.module.flags = !{!2, !3}
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!0 = distinct !DICompileUnit(language: DW_LANG_HLSL, file: !1, producer: "clang", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug)
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!1 = !DIFile(filename: "vector.hlsl", directory: "/src")
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!2 = !{i32 7, !"Dwarf Version", i32 5}
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!3 = !{i32 2, !"Debug Info Version", i32 3}
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!6 = distinct !DISubprogram(name: "test", scope: !1, file: !1, line: 1, type: !7, scopeLine: 1, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !0, retainedNodes: !9)
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!7 = !DISubroutineType(types: !8)
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!8 = !{null}
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!9 = !{}
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!10 = !DILocalVariable(name: "f4", scope: !6, file: !1, line: 2, type: !11)
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!11 = !DICompositeType(tag: DW_TAG_array_type, baseType: !12, size: 128, flags: DIFlagVector, elements: !13)
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!12 = !DIBasicType(name: "float", size: 32, encoding: DW_ATE_float)
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!13 = !{!DISubrange(count: 4)}
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!14 = !DILocation(line: 2, column: 10, scope: !6)
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!15 = !DILocalVariable(name: "f3", scope: !6, file: !1, line: 3, type: !16)
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!16 = !DICompositeType(tag: DW_TAG_array_type, baseType: !12, size: 96, flags: DIFlagVector, elements: !20)
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!17 = !DILocation(line: 3, column: 10, scope: !6)
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!18 = !DILocalVariable(name: "i4", scope: !6, file: !1, line: 4, type: !19)
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!19 = !DICompositeType(tag: DW_TAG_array_type, baseType: !21, size: 128, flags: DIFlagVector, elements: !13)
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!20 = !{!DISubrange(count: 3)}
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!21 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
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!22 = !DILocation(line: 4, column: 8, scope: !6)
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